

Overview
The RT6365GSP is a DC DC Converter made by Richtek Tech in a SOP-8-EP package with 9 pins. -40℃~+150℃@(TJ) 1 100uA 2.5MHz 4V~60V 5A 800mV~60V Adjustable Buck Buck Built-in No SOP-8-EP DC-DC Converters ROHS.
PCBKit's library has its KiCad symbol (EasyEDA_Cloud:RTQ6363GSP, from EasyEDA) and its footprint (EasyEDA_Cloud:SOP-8_L5.0-W3.9-P1.27-LS6.0-BL-EP, from EasyEDA), ready for a KiCad board. 8,775 are in stock at JLCPCB (part C3024482). 1 open-source board in 1 repository on GitHub use it.
Symbol
Footprint
From the datasheet
16- Supply, least
- 4 V · VIN, min operating voltage after soft-start is finished · p. 11
- Supply, most
- 60 V · VIN, max operating voltage after soft-start is finished · p. 11
- Supply, absolute maximum
- 65 V · VIN, absolute maximum · p. 10
- Junction, hottest
- 150 °C · Junction temperature, absolute maximum · p. 10
- Takes working
- 100 µA · Typical quiescent current, enabled, VFB = 0.83V, not switching · p. 11
- Takes asleep
- 2.25 µA · Typical shutdown current, VEN = 0V · p. 11
- Gives
- 5 A · Rated continuous output current · p. 1
- Current limit
- 7.5 A · Typical peak current limit, fSW = 500kHz, VOUT = 5V · p. 11
- Feedback reference
- 800 mV · Typical feedback reference voltage · p. 11
- Switches at
- 105 kHz · Typical switching frequency, RRT/SYNC = 1MΩ · p. 12
- Switches at
- 500 kHz · Typical switching frequency, RRT/SYNC = 200kΩ · p. 12
- Switches at
- 2.45 MHz · Typical switching frequency, RRT/SYNC = 37.4kΩ · p. 12
- Junction to air (SOP-8 (Exposed pad))
- 30.4 K/W · Junction-to-ambient thermal resistance, JEDEC standard · p. 10
- Junction to air (SOP-8 (Exposed pad))
- 30 K/W · Junction-to-ambient thermal resistance, specific EVB · p. 10
- Junction to case (SOP-8 (Exposed pad))
- 73.9 K/W · Junction-to-case, top, thermal resistance · p. 10
- Junction to board (SOP-8 (Exposed pad))
- 13.2 K/W · Junction-to-board characterization parameter, ψJB · p. 10
What it is and has
12- Control
- Peak current mode · p. 1
- Output voltage range
- 0.8V to VIN · p. 1
- Reference accuracy
- 0.8V ±1% · p. 1
- Integrated high-side MOSFET
- 70mΩ · p. 1
- Adjustable switching frequency
- 100kHz to 2.5MHz · p. 1
- External synchronization
- 300kHz to 2.2MHz · p. 1
- Light-load operation
- Power Saving Mode (PSM) · p. 1
- Enable control
- Enable pin · p. 1
- UVLO
- Adjustable voltage and hysteresis · p. 1
- Protection
- UVLO, UVP, OVP, OCP, OTP · p. 1
- Soft-start
- Internal soft-start, RT6365GSP · p. 7
- Lead plating
- Green, halogen free and Pb free · p. 2
Around it
3- cap 0.1F
- between BOOT and SW; Ceramic bootstrap capacitor for the high-side gate driver. · p. 3
- cap four 2.2F or larger
- between VIN and GND; Ceramic input capacitors; the description additionally specifies two capacitors with typical capacitance 4.7uF. · p. 3
- cap 4.7F
- between VIN and GND; Two input capacitors with this typical capacitance, alongside the four 2.2uF or larger ceramic capacitors. · p. 3
Specifications
53| Parameter | Conditions | As printed | Page |
|---|---|---|---|
| Supply Voltage, VIN VIN | min -0.3 · max 65 V | 10 | |
| Enable Voltage, EN EN | min -0.3 · max 65 V | 10 | |
| Switch Voltage, SW SW | min -0.6 · max 65 V | 10 | |
| SW (t ≤ 100ns) SW | t ≤ 100ns | min -5 · max 70 V | 10 |
| Power Good Voltage, PGOOD PGOOD | min -0.3 · max 65 V | 10 | |
| BOOT to SW (BOOT−SW) BOOT−SW | min -0.3 · max 6 V | 10 | |
| All Other Pins | min -0.3 · max 6 V | 10 | |
| Lead Temperature (Soldering, 10 sec.) | Soldering, 10 sec. | max 260 °C | 10 |
| Junction Temperature | max 150 °C | 10 | |
| Storage Temperature Range | min -65 · max 150 °C | 10 | |
| HBM (Human Body Model) | max 2 kV | 10 | |
| Supply Input Voltage, VIN VIN | min 4 · max 60 V | 10 | |
| Output Voltage | Upper limit is VIN | min 0.8 V | 10 |
| Junction Temperature Range | min -40 · max 125 °C | 10 | |
| Junction-to-ambient thermal resistance (JEDEC standard) JA | SOP-8 (Exposed pad); JEDEC 51-7, TA = 25°C | typ 30.4 C/W | 10 |
| Junction-to-case (top) thermal resistance JC(Top) | SOP-8 (Exposed pad); JEDEC 51-7, TA = 25°C | typ 73.9 C/W | 10 |
| Junction-to-case (bottom) thermal resistance JC(Bottom) | SOP-8 (Exposed pad); JEDEC 51-7, TA = 25°C | typ 3.4 C/W | 10 |
| Junction-to-ambient thermal resistance (specific EVB) JA(EVB) | SOP-8 (Exposed pad); four-layer 70mm x 50mm board, outer layers 2 oz. Cu, inner layers 1 oz. Cu | typ 30 C/W | 10 |
| Junction-to-top characterization parameter JC(Top) | SOP-8 (Exposed pad); four-layer 70mm x 50mm board, outer layers 2 oz. Cu, inner layers 1 oz. Cu | typ 5 C/W | 10 |
| Junction-to-board characterization parameter JB | SOP-8 (Exposed pad); four-layer 70mm x 50mm board, outer layers 2 oz. Cu, inner layers 1 oz. Cu | typ 13.2 C/W | 10 |
| Input Operating Voltage VIN | VIN = 12V, TA = TJ = 25°C unless otherwise specified; After soft-start is finished | min 4 · max 60 V | 11 |
| VIN Under-Voltage Lockout Threshold VUVLOH | TA = TJ = 25°C; VIN rising | min 4.1 · typ 4.3 · max 4.5 V | 11 |
| VIN Under-Voltage Lockout Threshold VUVLOL | TA = TJ = 25°C; VIN falling | min 3.8 · typ 3.9 · max 4 V | 11 |
| Shutdown Current ISHDN | VIN = 12V, TA = TJ = 25°C; VEN = 0V | typ 2.25 · max 5 A | 11 |
| Quiescent Current IQ | VIN = 12V, TA = TJ = 25°C; VEN = 2V, VFB = 0.83V, not switching | typ 100 · max 135 A | 11 |
| Enable Threshold Voltage VTH_EN | VIN = 12V, TA = TJ = 25°C | min 1.1 · typ 1.2 · max 1.3 V | 11 |
| Enable to COMP Active | VIN = 12V, TA = 25C | typ 540 s | 11 |
| Pull-Up Current IEN | VIN = 12V, TA = TJ = 25°C; VTH_EN + 50mV | typ 4.6 A | 11 |
| Pull-Up Current IEN | VIN = 12V, TA = TJ = 25°C; VTH_EN 50mV | min 0.58 · typ 1.2 · max 1.8 A | 11 |
| Hysteresis Current IEN_Hys | VIN = 12V, TA = TJ = 25°C | min 2.2 · typ 3.4 · max 4.5 A | 11 |
| Reference Voltage VREF | VIN = 12V, TA = TJ = 25°C | min 0.792 · typ 0.8 · max 0.808 V | 11 |
| High-Side Switch On-Resistance RDS(ON)_H | TA = TJ = 25°C; VIN = 12V, VBOOT VSW = 5V | typ 70 · max 140 m | 11 |
| Input Current | VIN = 12V, TA = TJ = 25°C | typ 50 nA | 11 |
| Error Amplifier Trans-Conductance gm | VIN = 12V, TA = TJ = 25°C; Normal operation, 2A < ICOMP < 2A, VCOMP = 1V | typ 440 A/V | 11 |
| Error Amplifier Trans-Conductance gm | VIN = 12V, TA = TJ = 25°C; During SS, 2A < ICOMP < 2A, VCOMP = 1V, VFB = 0.4V | typ 77 A/V | 11 |
| Error Amplifier DC Gain | VIN = 12V, TA = TJ = 25°C; VFB = 0.8V | typ 10000 V/V | 11 |
| Error Amplifier Bandwidth | VIN = 12V, TA = TJ = 25°C | typ 2500 kHz | 11 |
| Source/Sink Current | VIN = 12V, TA = TJ = 25°C; VCOMP = 1V, 100mV overdrive; typical magnitude, printed as 30 | typ 30 A | 11 |
| COMP to Current Sense Trans-Conductance gm_cs | VIN = 12V, TA = TJ = 25°C | typ 17 A/V | 11 |
| Current Limit ILIM | VIN = 12V, TA = TJ = 25°C; f SW = 500kHz, VOUT = 5V | min 6.375 · typ 7.5 · max 8.625 A | 11 |
| Minimum On-Time tON_MIN | VIN = 12V, TA = TJ = 25°C; IOUT = 1A | max 135 ns | 12 |
| Switching Frequency 1 f SW1 | VIN = 12V, TA = TJ = 25°C; RRT/SYNC = 1M | min 90 · typ 105 · max 120 kHz | 12 |
| Switching Frequency 2 f SW2 | VIN = 12V, TA = TJ = 25°C; RRT/SYNC = 200k | min 450 · typ 500 · max 550 kHz | 12 |
| Switching Frequency 3 f SW3 | VIN = 12V, TA = TJ = 25°C; RRT/SYNC = 37.4k | min 2200 · typ 2450 · max 2700 kHz | 12 |
| SYNC Frequency Range | VIN = 12V, TA = TJ = 25°C; External clock | min 0.3 · max 2.2 MHz | 12 |
| Minimum Sync Pulse Width | VIN = 12V, TA = TJ = 25°C | typ 20 ns | 12 |
| SYNC Threshold Voltage VIH_SYNC | VIN = 12V, TA = TJ = 25°C | typ 1.55 · max 2 V | 12 |
| SYNC Threshold Voltage VIL_SYNC | VIN = 12V, TA = TJ = 25°C | min 0.5 · typ 1.2 V | 12 |
| RT/SYNC Falling Edge to SW Rising Edge Delay | VIN = 12V, TA = TJ = 25°C | typ 70 ns | 12 |
| Soft-Start Period | VIN = 12V, TA = TJ = 25°C; 10% to 90%, RT6365GSP | min 1.4 · typ 2 · max 2.6 ms | 12 |
| Thermal Shutdown TSD | VIN = 12V, TA = TJ = 25°C unless otherwise specified | typ 175 °C | 13 |
| Thermal Shutdown Hysteresis TSD | VIN = 12V, TA = TJ = 25°C unless otherwise specified | typ 15 °C | 13 |
| UVP Trip Threshold VUVP | VIN = 12V, TA = TJ = 25°C; UVP detect | typ 0.4 V | 13 |
Pins, by the datasheet
9- 1 BOOT
- Bootstrap supply for the high-side gate driver; connect a 0.1uF ceramic capacitor between BOOT and SW. · p. 3
- 2 VIN
- Power input, 4V to 60V; connect suitable input capacitors between VIN and GND. · p. 3
- 3 EN
- Enable control with internal pull-up current source; floating or logic-high enables the converter, and logic-low forces shutdown. · p. 3
- 4 RT/SYNC
- Connect a resistor to GND to set switching frequency, or connect a clock source for external synchronization. · p. 3
- 5 FB
- Output voltage sense through a resistive divider; feedback reference is typically 0.8V. · p. 3
- 6 COMP
- Connect external compensation elements to stabilize the control loop. · p. 3
- 7 GND
- Ground return path for the control circuitry. · p. 3
- 8 SW
- Switching node supplying power to the output; connect the output LC filter from SW to the output load. · p. 3
- 9 PAD
- Internally unconnected exposed pad; must be soldered to a large PCB copper area for maximum power dissipation. · p. 3
Ordering codes, by the datasheet
1- RT6365GSP
- SOP-8 (Exposed Pad-Option 2) · Green, halogen free and Pb free; internal soft-start. · p. 2
Parameters
21- Current Limit
- 7.5A
- Features
- Cycle-by-cycle current limiting
- Frequency - Switching
- 2.5MHz
- Function
- Step-down type
- Junction Temperature(Max)
- 150℃
- Number of Outputs
- 1
- Operating Temperature
- -40℃~+150℃@(TJ)
- Output Current
- 5A
- Output Type
- Adjustable
- Output Voltage
- 800mV~60V
- Quiescent Current
- 100uA
- Reference Voltage
- 800mV
- Standby Current
- 2.25uA
- Switch tube (built-in/external)
- Built-in
- Synchronous Rectifier
- No
- Thermal Resistance(Junction to Ambient)
- 30.4℃/W
- Thermal Resistance(Junction to Board)
- 13.2℃/W
- Thermal Resistance(Junction to Case)
- 73.9℃/W
- Topology
- Buck
- Voltage - Supply
- 4V~60V
- Voltage - Supply(Absolute Max)
- 65V
Order codes
1- RT6365GSPLCSC C3024482
Pinout
9| Pin | Name | Type |
|---|---|---|
| 1 | BOOT | Unspecified |
| 2 | VIN | Unspecified |
| 3 | EN | Unspecified |
| 4 | RT/SYNC | Unspecified |
| 5 | FB | Unspecified |
| 6 | COMP | Unspecified |
| 7 | GND | Unspecified |
| 8 | SW | Unspecified |
| 9 | EP | Unspecified |
Open-source boards using it
All 1- 4 layers65 × 56.5 mm

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Is there a KiCad symbol and footprint for the RT6365GSP?
Yes. The symbol is EasyEDA_Cloud:RTQ6363GSP and the footprint EasyEDA_Cloud:SOP-8_L5.0-W3.9-P1.27-LS6.0-BL-EP, both drawn on this page. PCBKit places them on a board for you when you design with it.
What package is the RT6365GSP?
SOP-8-EP, with 9 pins. Its footprint is drawn on this page.
Where is the RT6365GSP datasheet?
Richtek Tech publishes it: the Datasheet link on this page opens it.
Where can I order the RT6365GSP?
JLCPCB lists it as part C3024482, with 8,775 in stock; the sellers' links on this page open their listings.
What can replace the RT6365GSP?
Parts like it in the library: the RTQ2965GSP-QA by Richtek Tech. Check their datasheets: a part that fits the footprint may still differ in its ratings.
Which open-source boards use the RT6365GSP?
1 board in 1 repository on GitHub; the most starred are listed on this page, with their KiCad files.