4 layers89.9 × 88.8 mm
.jpg?shape=card)
Overview
The SC0914(7) is a microcontroller made by Raspberry Pi in a QFN-56(7x7) package with 57 pins. -40℃~+85℃@(TC) 1.8V~3.3V 12bit 133MHz 264KB 30 32 Bit ARM Cortex-M0+ Built-in+External External QFN-56(7x7) Microcontrollers (MCU/MPU/SOC) ROHS.
PCBKit's library has its KiCad symbol (corpus:SC0914_7_428a2d1d, from open boards on GitHub) and its footprint (EasyEDA_Cloud:QFN-56_L7.0-W7.0-P0.40-TL-EP3.1, from EasyEDA), ready for a KiCad board. JLCPCB lists it (part C6472266). 1 open-source board in 1 repository on GitHub use it.
Symbol
Footprint
From the datasheet
12- Supply, least
- 1.62 V · IOVDD, recommended operating min · p. 621
- Supply, most
- 3.63 V · IOVDD, recommended operating max · p. 621
- Supply, least
- 1.05 V · DVDD, recommended operating min · p. 621
- Supply, most
- 1.16 V · DVDD, recommended operating max · p. 621
- Supply, least
- 3.135 V · USB_VDD, recommended operating min · p. 621
- Supply, absolute maximum
- 3.63 V · IOVDD, absolute max · p. 617
- Junction to air (QFN 56)
- 48 K/W · junction to ambient · p. 611
- Junction to case (QFN 56)
- 19.01 K/W · junction to case · p. 611
- Junction to board (QFN 56)
- 29.03 K/W · junction to board · p. 611
- Takes asleep
- 180 µA · DVDD, Dormant typical average · p. 623
- Takes asleep
- 390 µA · DVDD, Sleep typical average · p. 623
- Supply, least
- 1.63 V · VREG_VIN, min input supply voltage for internal regulator · p. 163
What it is and has
27- Core and clock
- Dual ARM Cortex-M0+ @ 133MHz · p. 10
- SRAM
- 264kB in six independent banks · p. 10
- External Flash support
- Up to 16MB via dedicated QSPI bus · p. 10
- DMA
- DMA controller · p. 10
- Bus
- Fully-connected AHB crossbar · p. 10
- Arithmetic peripherals
- Interpolator and integer divider · p. 10
- Core regulator
- On-chip programmable LDO · p. 10
- PLL
- 2 · p. 10
- GPIO
- 30 pins; 4 can be analogue inputs · p. 10
- UART
- 2 · p. 10
- SPI
- 2 controllers · p. 10
- I2C
- 2 controllers · p. 10
- PWM
- 16 channels · p. 10
- USB
- USB 1.1 controller and PHY; host and device support · p. 10
- PIO
- 8 state machines · p. 10
- Package
- 7×7 mm QFN-56 · p. 611
- GPIO drive strength
- 2mA, 4mA, 8mA or 12mA · p. 240
- GPIO slew rate
- slow or fast · p. 240
- GPIO input hysteresis
- Schmitt trigger mode can be enabled · p. 240
- I2C operating modes
- Master or Slave; default Master · p. 441
- I2C speed modes
- Standard mode, Fast mode or Fast mode plus · p. 441
- I2C addressing
- 10-bit addressing in Master mode · p. 441
- I2C transmit buffer
- 16 elements per controller · p. 441
- I2C receive buffer
- 16 elements per controller · p. 441
- I2C DMA
- Supported · p. 441
- I2C interrupts
- Supported · p. 441
- Moisture Sensitivity Level
- 1 · p. 614
Around it
2- res 27Ω
- between USB_DP and USB Data +ve; Series resistor required for USB operation. · p. 617
- res 27Ω
- between USB_DM and USB Data -ve; Series resistor required for USB operation. · p. 617
Specifications
131| Parameter | Conditions | As printed | Page |
|---|---|---|---|
| θJA θJA | QFN 56 | typ 48 °C/W | 611 |
| ψJT ψJT | QFN 56 | typ 0.8 °C/W | 611 |
| ψJB ψJB | QFN 56 | typ 29.2 °C/W | 611 |
| TJ TJ | QFN 56 | typ 42 °C | 611 |
| TT TT | QFN 56 | typ 41.8 °C | 611 |
| θJC θJC | QFN 56 | typ 19.01 °C/W | 611 |
| θJB θJB | QFN 56 | typ 29.03 °C/W | 611 |
| I/O Supply Voltage IOVDD | min -0.5 · max 3.63 V | 617 | |
| Voltage at IO VPIN | Maximum: IOVDD + 0.5 V | min -0.5 V | 617 |
| Human Body Model HBM | All pins unless otherwise stated; JEDEC JS-001-2012 | max 2 kV | 617 |
| Human Body Model HBM | Digital (FT) pins only; JEDEC JS-001-2012 | max 4 kV | 618 |
| Charged Device Model CDM | JESD22-C101E (December 2009) | max 500 V | 618 |
| Case Temperature TC | min -40 · max 85 °C | 618 | |
| Pin Input Leakage Current IIN | max 1 uA | 618 | |
| Input Voltage High @ IOVDD=2.5V VIH | IOVDD=2.5V; maximum IOVDD + 0.3 | min 1.7 V | 618 |
| Input Voltage High @ IOVDD=3.3V VIH | IOVDD=3.3V; maximum IOVDD + 0.3 | min 2 V | 618 |
| Input Voltage Low @ IOVDD=1.8V VIL | IOVDD=1.8V; maximum 0.35 * IOVDD | min -0.3 V | 618 |
| Input Voltage Low @ IOVDD=2.5V VIL | IOVDD=2.5V | min -0.3 · max 0.7 V | 618 |
| Input Voltage Low @ IOVDD=3.3V VIL | IOVDD=3.3V | min -0.3 · max 0.8 V | 618 |
| Input Hysteresis Voltage @ IOVDD=2.5V VHYS | IOVDD=2.5V; Schmitt Trigger enabled | min 0.2 V | 618 |
| Input Hysteresis Voltage @ IOVDD=3.3V VHYS | IOVDD=3.3V; Schmitt Trigger enabled | min 0.2 V | 618 |
| Output Voltage High @ IOVDD=1.8V VOH | IOVDD=1.8V; IOH = 2, 4, 8 or 12mA depending on setting; maximum IOVDD | min 1.24 V | 618 |
| Output Voltage High @ IOVDD=2.5V VOH | IOVDD=2.5V; IOH = 2, 4, 8 or 12mA depending on setting; maximum IOVDD | min 1.78 V | 619 |
| Output Voltage High @ IOVDD=3.3V VOH | IOVDD=3.3V; IOH = 2, 4, 8 or 12mA depending on setting; maximum IOVDD | min 2.62 V | 619 |
| Output Voltage Low @ IOVDD=1.8V VOL | IOVDD=1.8V; IOL = 2, 4, 8 or 12mA depending on setting | min 0 · max 0.3 V | 619 |
| Output Voltage Low @ IOVDD=2.5V VOL | IOVDD=2.5V; IOL = 2, 4, 8 or 12mA depending on setting | min 0 · max 0.4 V | 619 |
| Output Voltage Low @ IOVDD=3.3V VOL | IOVDD=3.3V; IOL = 2, 4, 8 or 12mA depending on setting | min 0 · max 0.5 V | 619 |
| Pull-Up Resistance RPU | min 50 · max 80 kΩ | 619 | |
| Pull-Down Resistance RPD | min 50 · max 80 kΩ | 619 | |
| Maximum Total IOVDD current IIOVDD_MAX | Sum of all current being sourced by GPIO and QSPI pins | max 50 mA | 619 |
| Maximum Total VSS current due to IO (IOVSS) IIOVSS_MAX | Sum of all current being sunk into GPIO and QSPI pins | max 50 mA | 619 |
| Single Ended Input Voltage High VIHSE | min 2 V | 619 | |
| Single Ended Input Voltage Low VILSE | max 0.8 V | 619 | |
| Differential Input Voltage High VIHDIFF | min 0.2 V | 619 | |
| Differential Input Voltage Low VILDIFF | max -0.2 V | 619 | |
| Output Voltage High VOH | Maximum USB_VDD | min 2.8 V | 619 |
| Output Voltage Low VOL | min 0 · max 0.3 V | 619 | |
| Pull-Up Resistance - RPU2 RPU2 | min 0.873 · max 1.548 kΩ | 619 | |
| Pull-Up Resistance - RPU1&2 RPU1&2 | min 1.398 · max 3.063 kΩ | 620 | |
| Pull-Down Resistance RPD | min 14.25 · max 15.75 kΩ | 620 | |
| ADC Input Voltage Range VPIN_ADC | Maximum ADC_AVDD | min 0 V | 620 |
| Effective Number of Bits ENOB | See Section 4.9.3 | min 8.7 bits | 620 |
| Resolved Bits | max 12 bits | 620 | |
| ADC Input Impedance RIN_ADC | min 100 kΩ | 620 | |
| Input Voltage Low VIL | XIN only; XOUT floating; maximum 0.35*IOVDD | min 0 V | 620 |
| IOVDD IOVDD | Digital IO; typical 1.8 / 3.3 V; adjust GPIO VOLTAGE_SELECT when IOVDD <2.5V | min 1.62 · max 3.63 V | 621 |
| DVDD DVDD | Digital core; short term transients within +/-100mV | min 1.05 · typ 1.1 · max 1.16 V | 621 |
| VREG_VIN VREG_VIN | Voltage regulator; typical 1.8 / 3.3 V | min 1.62 · max 3.63 V | 621 |
| USB_VDD USB_VDD | USB PHY | min 3.135 · typ 3.3 · max 3.63 V | 621 |
| ADC_AVDD ADC_AVDD | ADC; performance compromised below 2.97V | min 1.62 · typ 3.3 · max 3.63 V | 621 |
| DMA | Increase in DVDD current when peripheral clocks enabled | typ 2.6 uA/MHz | 622 |
| I2C0 | Increase in DVDD current when peripheral clocks enabled | typ 3.9 uA/MHz | 622 |
| I2C1 | Increase in DVDD current when peripheral clocks enabled | typ 3.8 uA/MHz | 622 |
| IO + Pads | Increase in DVDD current when peripheral clocks enabled | typ 23.6 uA/MHz | 622 |
| PIO0 | Increase in DVDD current when peripheral clocks enabled | typ 12.3 uA/MHz | 622 |
| PIO1 | Increase in DVDD current when peripheral clocks enabled | typ 12.5 uA/MHz | 622 |
| PWM | Increase in DVDD current when peripheral clocks enabled | typ 5 uA/MHz | 622 |
| RTC | Increase in DVDD current when peripheral clocks enabled | typ 1.1 uA/MHz | 622 |
| SIO | Increase in DVDD current when peripheral clocks enabled | typ 1.9 uA/MHz | 622 |
| SPI0 | Increase in DVDD current when peripheral clocks enabled | typ 1.7 uA/MHz | 622 |
| SPI1 | Increase in DVDD current when peripheral clocks enabled | typ 1.8 uA/MHz | 622 |
| Timer | Increase in DVDD current when peripheral clocks enabled | typ 1.2 uA/MHz | 622 |
| UART0 | Increase in DVDD current when peripheral clocks enabled | typ 3.5 uA/MHz | 622 |
| UART1 | Increase in DVDD current when peripheral clocks enabled | typ 3.7 uA/MHz | 622 |
| Watchdog | Increase in DVDD current when peripheral clocks enabled | typ 1 uA/MHz | 622 |
| XIP | Increase in DVDD current when peripheral clocks enabled | typ 37.6 uA/MHz | 622 |
| ADC | DVDD; system clock 125 MHz; unit copied from table heading | typ 0.1 uA/MHz | 622 |
| USBCTRL | DVDD; system clock 125 MHz; unit copied from table heading | typ 1.3 uA/MHz | 622 |
| Popcorn | DVDD average current; system clock 48MHz | typ 10.9 · max 16.6 mA | 623 |
| Popcorn | IOVDD average current; system clock 48MHz | typ 24.8 · max 35.5 mA | 623 |
| BOOTSEL mode - Active | DVDD average current | typ 9.4 · max 14.7 mA | 623 |
| BOOTSEL mode - Active | IOVDD average current | typ 1.2 · max 4.3 mA | 623 |
| BOOTSEL mode - Active | USB_VDD average current | typ 1.4 · max 2 mA | 623 |
| BOOTSEL mode - Idle | DVDD average current | typ 9 · max 14.3 mA | 623 |
| BOOTSEL mode - Idle | IOVDD average current | typ 1.2 · max 4.3 mA | 623 |
| BOOTSEL mode - Idle | USB_VDD average current | typ 0.2 · max 0.6 mA | 623 |
| Dormant | DVDD average current | typ 0.18 · max 4.2 mA | 623 |
| Sleep | DVDD average current | typ 0.39 · max 4.5 mA | 623 |
| input supply voltage VVREG_VIN | Internal voltage regulator; typical range printed as 1.8 - 3.3 V | min 1.63 · max 3.63 V | 163 |
| output voltage variation ΔVVREG_VOUT | min -3 · max 3 % of selected output voltage | 163 | |
| output current IMAX | Internal voltage regulator | max 100 mA | 163 |
| current limit ILIMIT | Internal voltage regulator | min 150 · typ 350 · max 450 mA | 163 |
| ROK assertion threshold ROKTH.ASSERT | min 87 · typ 90 · max 93 % of selected output voltage | 163 | |
| ROK deassertion threshold ROKTH.DEASSERT | min 84 · typ 87 · max 90 % of selected output voltage | 163 | |
| power-up time tPOWER-ON | EN = 1, load current = 0mA, VREG_VIN ramps up in 100us; values vary with load current and capacitance on VREG_VOUT | typ 275 · max 350 us | 163 |
| θJA θJA | RP2040 QFN 56 package | typ 48 °C/W | 611 |
| ψJT ψJT | RP2040 QFN 56 package | typ 0.8 °C/W | 611 |
| ψJB ψJB | RP2040 QFN 56 package | typ 29.2 °C/W | 611 |
| TJ TJ | RP2040 QFN 56 package; tabulated temperature, not a maximum rating | typ 42 °C | 611 |
| TT TT | RP2040 QFN 56 package; tabulated temperature | typ 41.8 °C | 611 |
| θJC θJC | RP2040 QFN 56 package | typ 19.01 °C/W | 611 |
| θJB θJB | RP2040 QFN 56 package | typ 29.03 °C/W | 611 |
| Human Body Model HBM | Compliant with JEDEC specification JS-001-2012 (April 2012) | max 2 kV | 617 |
| Human Body Model HBM | Digital (FT) pins only; compliant with JEDEC specification JS-001-2012 (April 2012) | max 4 kV | 618 |
| Charged Device Model CDM | Compliant with JESD22-C101E (December 2009) | max 500 V | 618 |
| Input Voltage High VIH | IOVDD=2.5V; maximum: IOVDD + 0.3 | min 1.7 V | 618 |
| Input Voltage High VIH | IOVDD=3.3V; maximum: IOVDD + 0.3 | min 2 V | 618 |
| Input Voltage Low VIL | IOVDD=1.8V; maximum: 0.35 * IOVDD | min -0.3 V | 618 |
| Input Voltage Low VIL | IOVDD=2.5V | min -0.3 · max 0.7 V | 618 |
| Input Voltage Low VIL | IOVDD=3.3V | min -0.3 · max 0.8 V | 618 |
| Input Hysteresis Voltage VHYS | IOVDD=2.5V; Schmitt Trigger enabled | min 0.2 V | 618 |
| Input Hysteresis Voltage VHYS | IOVDD=3.3V; Schmitt Trigger enabled | min 0.2 V | 618 |
| Output Voltage High VOH | IOVDD=1.8V; IOH = 2, 4, 8 or 12mA depending on setting; maximum: IOVDD | min 1.24 V | 618 |
| DMA | Typical DVDD current increase when peripheral clocks are enabled | typ 2.6 uA/MHz | 622 |
| I2C0 | Typical DVDD current increase when peripheral clocks are enabled | typ 3.9 uA/MHz | 622 |
| I2C1 | Typical DVDD current increase when peripheral clocks are enabled | typ 3.8 uA/MHz | 622 |
| IO + Pads | Typical DVDD current increase when peripheral clocks are enabled | typ 23.6 uA/MHz | 622 |
| PIO0 | Typical DVDD current increase when peripheral clocks are enabled | typ 12.3 uA/MHz | 622 |
| PIO1 | Typical DVDD current increase when peripheral clocks are enabled | typ 12.5 uA/MHz | 622 |
| PWM | Typical DVDD current increase when peripheral clocks are enabled | typ 5 uA/MHz | 622 |
| RTC | Typical DVDD current increase when peripheral clocks are enabled | typ 1.1 uA/MHz | 622 |
| SIO | Typical DVDD current increase when peripheral clocks are enabled | typ 1.9 uA/MHz | 622 |
| SPI0 | Typical DVDD current increase when peripheral clocks are enabled | typ 1.7 uA/MHz | 622 |
| SPI1 | Typical DVDD current increase when peripheral clocks are enabled | typ 1.8 uA/MHz | 622 |
| Timer | Typical DVDD current increase when peripheral clocks are enabled | typ 1.2 uA/MHz | 622 |
| UART0 | Typical DVDD current increase when peripheral clocks are enabled | typ 3.5 uA/MHz | 622 |
| UART1 | Typical DVDD current increase when peripheral clocks are enabled | typ 3.7 uA/MHz | 622 |
| Watchdog | Typical DVDD current increase when peripheral clocks are enabled | typ 1 uA/MHz | 622 |
| XIP | Typical DVDD current increase when peripheral clocks are enabled | typ 37.6 uA/MHz | 622 |
| ADC | Standard clocks, system clock of 125 MHz; unit copied from table header | typ 0.1 uA/MHz | 622 |
| USBCTRL | Standard clocks, system clock of 125 MHz; unit copied from table header | typ 1.3 uA/MHz | 622 |
| Average DVDD Current | Popcorn; system clock frequency of 48MHz | typ 10.9 · max 16.6 mA | 623 |
| Average IOVDD Current | Popcorn; system clock frequency of 48MHz | typ 24.8 · max 35.5 mA | 623 |
| Average DVDD Current | BOOTSEL mode - Active | typ 9.4 · max 14.7 mA | 623 |
| Average IOVDD Current | BOOTSEL mode - Active | typ 1.2 · max 4.3 mA | 623 |
| Average USB_VDD Current | BOOTSEL mode - Active | typ 1.4 · max 2 mA | 623 |
| Average DVDD Current | BOOTSEL mode - Idle | typ 9 · max 14.3 mA | 623 |
| Average IOVDD Current | BOOTSEL mode - Idle | typ 1.2 · max 4.3 mA | 623 |
| Average USB_VDD Current | BOOTSEL mode - Idle | typ 0.2 · max 0.6 mA | 623 |
| Average DVDD Current | Dormant | typ 0.18 · max 4.2 mA | 623 |
| Average DVDD Current | Sleep | typ 0.39 · max 4.5 mA | 623 |
Pins, by the datasheet
16- 19 TESTEN
- Test enable; connect to Gnd. IOVDD domain, pull-down at reset. · p. 617
- 47 USB_DP
- USB Data +ve; 27Ω series resistor required for USB operation. · p. 617
- 46 USB_DM
- USB Data -ve; 27Ω series resistor required for USB operation. · p. 617
- 1 IOVDD
- IO supply. · p. 617
- 10 IOVDD
- IO supply. · p. 617
- 22 IOVDD
- IO supply. · p. 617
- 33 IOVDD
- IO supply. · p. 617
- 42 IOVDD
- IO supply. · p. 617
- 49 IOVDD
- IO supply. · p. 617
- 23 DVDD
- Core supply. · p. 617
- 50 DVDD
- Core supply. · p. 617
- 44 VREG_VIN
- Voltage regulator input supply. · p. 617
- 45 VREG_VOUT
- Voltage regulator output. · p. 617
- 48 USB_VDD
- USB supply. · p. 617
- 43 ADC_AVDD
- ADC supply. · p. 617
- 57 GND
- Common ground connection via central pad. · p. 617
Parameters
15- ADC (Bit)
- 12bit
- CPU Core
- ARM Cortex-M0+
- CPU Maximum Speed
- 133MHz
- Core Size
- 32 Bit
- Number of I/O
- 30
- Operating Temperature
- -40℃~+85℃@(TC)
- Oscillator Type
- Built-in+External
- Program Memory Type
- External
- RAM Size
- 264KB
- Standby Current
- 180uA
- Thermal Resistance(Junction to Ambient)
- 48℃/W
- Thermal Resistance(Junction to Board)
- 29.03℃/W
- Thermal Resistance(Junction to Case)
- 19.01℃/W
- Voltage - Supply
- 1.05V~3.63V
- Voltage - Supply(Absolute Max)
- 3.63V
Order codes
1- SC0914(7)LCSC C6472266
Pinout
57| Pin | Name | Type |
|---|---|---|
| 1 | IOVDD_1 | Passive |
| 2 | GPIO0 | Passive |
| 3 | GPIO1 | Passive |
| 4 | GPIO2 | Passive |
| 5 | GPIO3 | Passive |
| 6 | GPIO4 | Passive |
| 7 | GPIO5 | Passive |
| 8 | GPIO6 | Passive |
| 9 | GPIO7 | Passive |
| 10 | IOVDD_2 | Passive |
| 11 | GPIO8 | Passive |
| 12 | GPIO9 | Passive |
| 13 | GPIO10 | Passive |
| 14 | GPIO11 | Passive |
| 15 | GPIO12 | Passive |
| 16 | GPIO13 | Passive |
| 17 | GPIO14 | Passive |
| 18 | GPIO15 | Passive |
| 19 | TESTEN | Passive |
| 20 | XIN | Passive |
| 21 | XOUT | Passive |
| 22 | IOVDD_3 | Passive |
| 23 | DVDD_1 | Passive |
| 24 | SWCLK | Passive |
| 25 | SWDIO | Passive |
| 26 | RUN | Passive |
| 27 | GPIO16 | Passive |
| 28 | GPIO17 | Passive |
| 29 | GPIO18 | Passive |
| 30 | GPIO19 | Passive |
| 31 | GPIO20 | Passive |
| 32 | GPIO21 | Passive |
| 33 | IOVDD_4 | Passive |
| 34 | GPIO22 | Passive |
| 35 | GPIO23 | Passive |
| 36 | GPIO24 | Passive |
| 37 | GPIO25 | Passive |
| 38 | GPIO26/ADC0 | Passive |
| 39 | GPIO27/ADC1 | Passive |
| 40 | GPIO28/ADC2 | Passive |
| 41 | GPIO29/ADC3 | Passive |
| 42 | IOVDD_5 | Passive |
| 43 | ADC_AVDD | Passive |
| 44 | VREG_VIN | Passive |
| 45 | VREG_VOUT | Passive |
| 46 | USB_DM | Passive |
| 47 | USB_DP | Passive |
| 48 | USB_VDD | Passive |
| 49 | IOVDD_6 | Passive |
| 50 | DVDD_2 | Passive |
| 51 | QSPI_SD3 | Passive |
| 52 | QSPI_SCLK | Passive |
| 53 | QSPI_SD0 | Passive |
| 54 | QSPI_SD2 | Passive |
| 55 | QSPI_SD1 | Passive |
| 56 | QSPI_SS_N | Passive |
| 57 | GND | Passive |
Open-source boards using it
All 1Show this part on your page
<iframe src="https://pcbkit.io/embed/parts/raspberry-pi/SC0914(7)" title="SC0914(7) in PCBKit" width="100%" height="480" style="border:0;border-radius:12px" allow="fullscreen" loading="lazy"></iframe><img src="https://pcbkit.io/embed/parts/raspberry-pi/SC0914(7).jpg" alt="SC0914(7)" width="1200" height="900">[.jpg?size=s)](https://pcbkit.io/parts/raspberry-pi/SC0914(7))Questions
Is there a KiCad symbol and footprint for the SC0914(7)?
Yes. The symbol is corpus:SC0914_7_428a2d1d and the footprint EasyEDA_Cloud:QFN-56_L7.0-W7.0-P0.40-TL-EP3.1, both drawn on this page. PCBKit places them on a board for you when you design with it.
What package is the SC0914(7)?
QFN-56(7x7), with 57 pins. Its footprint is drawn on this page.
Where is the SC0914(7) datasheet?
Raspberry Pi publishes it: the Datasheet link on this page opens it.
Where can I order the SC0914(7)?
JLCPCB lists it as part C6472266, with 0 in stock; the sellers' links on this page open their listings.
Which open-source boards use the SC0914(7)?
1 board in 1 repository on GitHub; the most starred are listed on this page, with their KiCad files.