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A1A2A3A4A5A6A7A8A9A10B1B2B3B4B5B6B7B8B9B10C1C2C3C4C5C6C7C8C9C10D1D2D3D4D5D6D7D8D9D10E1E2E3E4E5E6E7E8E9E10F1F2F3F4F5F6F7F8F9F10G1G2G3G4G5G6G7G8G9G10H1H2H3H4H5H6H7H8H9H10J1J2J3J4J5J6J7J8J9J10K1K2K3K4K5K6K7K8K9K10

FS32K146HAT0VMHT

NXP SemiconductorsExtended

-40℃~+105℃ 128KB 12bit 1MB 2.7V~5.5V 32 Bit 4KB 80MHz 89 8bit ARM Cortex-M4F Built-in FLASH MAPBGA-100 Microcontrollers (MCU/MPU/SOC) ROHS

DatasheetJLCPCBLCSC
Part id
nxp/FS32K146HAT0VMHT
Category
Microcontrollers (MCU, MPU, SOC)
Package
MAPBGA-100
Pins
100
In stock
0 at JLCPCB (C3210481)

Overview

The FS32K146HAT0VMHT is a microcontroller made by NXP Semiconductors in a MAPBGA-100 package with 100 pins. -40℃~+105℃ 128KB 12bit 1MB 2.7V~5.5V 32 Bit 4KB 80MHz 89 8bit ARM Cortex-M4F Built-in FLASH MAPBGA-100 Microcontrollers (MCU/MPU/SOC) ROHS.

PCBKit's library has its KiCad symbol (EasyEDA_Cloud:FS32K148HAT0MMHT, from EasyEDA) and its footprint (EasyEDA_Cloud:LFBGA-100_L10.0-W10.0-R10-C10-P1.00-TL, from EasyEDA), ready for a KiCad board. JLCPCB lists it (part C3210481).

Symbol

A2PTE16/LPUART1_RTS/LPSPI2_SIN/FTM2_CH7/FTM4_FLT0/FXIO_D3/TRGMUX_OUT7B2PTE15/LPUART1_CTS/LPSPI2_SCK/FTM2_CH6/FTM4_FLT1/FXIO_D2/TRGMUX_OUT6B1PTD1/FTM0_CH3/LPSPI1_SIN/FTM2_CH1/FXIO_D1/TRGMUX_OUT2C2PTD0/FTM0_CH2/LPSPI1_SCK/FTM2_CH0/FXIO_D0/TRGMUX_OUT1A1PTE11/LPSPI2_PCS0/LPTMR0_ALT1/FTM2_CH5/FXIO_D5/TRGMUX_OUT5C1PTE10/CLKOUT/LPSPI2_PCS1/FTM2_CH4/FXIO_D4/TRGMUX_OUT4D3PTE13/FTM4_CH5/LPSPI2_PCS2/FTM2_FLT0D2PTE5/TCLK2/FTM2_QD_PHA/FTM2_CH3/CAN0_TX/FXIO_D7/EWM_IND1PTE4/FTM2_QD_PHB/FTM2_CH2/CAN0_RX/FXIO_D6/EWM_OUT_bE5VDDE4VDDAE3VREFHE2VREFLD4VSSE1PTB7/LPI2C0_SCL/EXTALF1PTB6/LPI2C0_SDA/XTALF3PTE14/FTM0_FLT1/FTM2_FLT1F2PTE3/FTM0_FLT0/LPUART2_RTS/FTM2_FLT0/TRGMUX_IN6/CMP0_OUTF4PTE12/FTM0_FLT3/LPUART2_TX/FTM5_FLT0G1PTD17/FTM0_FLT2/LPUART2_RX/FTM5_FLT1G2PTD16/FTM0_CH1/LPSPI0_SIN/CMP0_RRTG3PTD15/FTM0_CH0/LPSPI0_SCKH1PTE9/FTM0_CH7/LPUART2_CTSH2PTD14/FTM2_CH5/LPUART1_TX/CLKOUTJ1PTD13/FTM2_CH4/LPUART1_RX/RTC_CLKOUTH3PTE8/FTM0_CH6/CMP0_IN3K1PTB5/FTM0_CH5/LPSPI0_PCS1/LPSPI0_PCS0/CLKOUT/TRGMUX_IN0K2PTB4/FTM0_CH4/LPSPI0_SOUT/TRGMUX_IN1J2PTC3/FTM0_CH3/CAN0_TX/LPUART0_TX/ADC0_SE11/CMP0_IN4J3PTC2/FTM0_CH2/CAN0_RX/LPUART0_RX/ADC0_SE10/CMP0_IN5K3PTD7/LPUART2_TX/FTM2_FLT3/CMP0_IN6J4PTD6/LPUART2_RX/FTM2_FLT2/CMP0_IN7K4PTD5/FTM2_CH3/LPTMR0_ALT2/FTM2_FLT1/TRGMUX_IN7H4PTD12/FTM2_CH2/LPUART2_RTSG5PTD11/FTM2_CH1/FTM2_QD_PHA/LPUART2_CTSK5PTD10/FTM2_CH0/FTM2_QD_PHB/CLKOUTG4VSSF5VDDH5PTC1/FTM0_CH1/LPSPI2_SOUT/FTM1_CH7/ADC0_SE9J5PTC0/FTM0_CH0/LPSPI2_SIN/FTM1_CH6/ADC0_SE8K6PTD9/FXIO_D0/FTM2_FLT3/FTM1_CH5J6PTD8/FTM2_FLT2/FXIO_D1/FTM1_CH4K7PTC17/FTM1_FLT3/CAN2_TX/ADC0_SE15J7PTC16/FTM1_FLT2/CAN2_RX/ADC0_SE14H6PTC15/FTM1_CH3/LPSPI2_SCK/TRGMUX_IN8/ADC0_SE13G6PTC14/FTM1_CH2/LPSPI2_PCS0/TRGMUX_IN9/ADC0_SE12H7PTB3/FTM1_CH1/LPSPI0_SIN/FTM1_QD_PHA/TRGMUX_IN2/ADC0_SE7K8PTB2/FTM1_CH0/LPSPI0_SCK/FTM1_QD_PHB/TRGMUX_IN3/ADC0_SE6J8PTC13/FTM3_CH7/FTM2_CH7/LPUART2_RTSK9PTC12/FTM3_CH6/FTM2_CH6/LPUART2_CTSH8PTC11/FTM3_CH5/FTM4_CH2/TRGMUX_IN10K10PTC10/FTM3_CH4/TRGMUX_IN11J9PTB1/LPUART0_TX/LPSPI0_SOUT/TCLK0/CAN0_TX/FTM4_CH5/ADC0_SE5/ADC1_SE15J10PTB0/LPUART0_RX/LPSPI0_PCS0/LPTMR0_ALT3/CAN0_RX/FTM4_CH6/ADC0_SE4/ADC1_SE14H9PTC9/LPUART1_TX/FTM1_FLT1/FTM5_CH0/LPUART0_RTSG8PTC8/LPUART1_RX/FTM1_FLT0/FTM5_CH1/LPUART0_CTSH10PTA7/FTM0_FLT2/FTM5_CH3/RTC_CLKIN/LPUART1_RTS/ADC0_SE3G9PTA6/FTM0_FLT1/LPSPI1_PCS1/FTM5_CH5/LPUART1_CTS/ADC0_SE2G10PTE7/FTM0_CH7/FTM3_FLT0G7VSSF6VDDF7PTA17/FTM0_CH6/FTM3_FLT0/EWM_OUT_b/FTM5_FLT0E7PTB17/FTM0_CH5/LPSPI1_PCS3/FTM5_FLT1F8PTB16/FTM0_CH4/LPSPI1_SOUT/ADC1_SE15F9PTB15/FTM0_CH3/LPSPI1_SIN/ADC1_SE14F10PTB14/FTM0_CH2/LPSPI1_SCK/ADC1_SE9/ADC0_SE9E8PTB13/FTM0_CH1/FTM3_FLT1/CAN2_TX/ADC1_SE8/ADC0_SE8E9PTB12/FTM0_CH0/FTM3_FLT2/CAN2_RX/ADC1_SE7E10PTD4/FTM0_FLT3/FTM3_FLT3/ADC1_SE6D10PTD3/FTM3_CH5/LPSPI1_PCS0/FXIO_D5/FXIO_D7/TRGMUX_IN4/NMI_b/ADC1_SE3D9PTD2/FTM3_CH4/LPSPI1_SOUT/FXIO_D4/FXIO_D6/TRGMUX_IN5/ADC1_SE2D8PTA3/FTM3_CH1/LPI2C0_SCL/EWM_IN/FXIO_D5/LPUART0_TX/ADC1_SE1C10PTA2/FTM3_CH0/LPI2C0_SDA/EWM_OUT_b/FXIO_D4/LPUART0_RX/ADC1_SE0C9PTB11/FTM3_CH3/LPI2C0_HREQB10PTB10/FTM3_CH2/LPI2C0_SDASC8PTB9/FTM3_CH1/LPI2C0_SCLSA10PTB8/FTM3_CH0B9PTA1/FTM1_CH1/LPI2C0_SDAS/FXIO_D3/FTM1_QD_PHA/LPUART0_RTS/TRGMUX_OUT0/ADC0_SE1/CMP0_IN1A9PTA0/FTM2_CH1/LPI2C0_SCLS/FXIO_D2/FTM2_QD_PHA/LPUART0_CTS/TRGMUX_OUT3/ADC0_SE0/CMP0_IN0B8PTC7/LPUART1_TX/CAN1_TX/FTM3_CH3/FTM1_QD_PHA/ADC1_SE5C7PTC6/LPUART1_RX/CAN1_RX/FTM3_CH2/FTM1_QD_PHB/ADC1_SE4A8PTA16/FTM1_CH3/LPSPI1_PCS2/ADC1_SE13B7PTA15/FTM1_CH2/LPSPI0_PCS3/LPSPI2_PCS3/ADC1_SE12A7PTE6/LPSPI0_PCS2/FTM3_CH7/LPUART1_RTS/ADC1_SE11B6PTE2/LPSPI0_SOUT/LPTMR0_ALT3/FTM3_CH6/LPUART1_CTS/ADC1_SE10D7VSSE6VDDC6PTA14/FTM0_FLT0/FTM3_FLT1/EWM_IN/FTM1_FLT0A6PTA13/FTM1_CH7/CAN1_TX/FTM2_QD_PHAA5PTA12/FTM1_CH6/CAN1_RX/FTM2_QD_PHBB5PTA11/FTM1_CH5/FXIO_D1/CMP0_RRTC5PTA10/FTM1_CH4/FXIO_D0/JTAG_TDO/noetm_TRACE_SWOA4PTE1/LPSPI0_SIN/LPI2C0_HREQ/LPSPI1_PCS0/FTM1_FLT1B4PTE0/LPSPI0_SCK/TCLK1/LPSPI1_SOUT/FTM1_FLT2D6PTC5/FTM2_CH0/RTC_CLKOUT/FTM2_QD_PHB/JTAG_TDID5PTC4/FTM1_CH0/RTC_CLKOUT/EWM_IN/FTM1_QD_PHB/JTAG_TCLK/SWD_CLK/CMP0_IN2C4PTA5/TCLK1/RESET_bC3PTA4/CMP0_OUT/EWM_OUT_b/JTAG_TMS/SWD_DIOA3PTA9/LPUART2_TX/LPSPI2_PCS0/FXIO_D7/FTM3_FLT2/FTM1_FLT3/FTM4_FLT0B3PTA8/LPUART2_RX/LPSPI2_SOUT/FXIO_D6/FTM3_FLT3/FTM4_FLT1
EasyEDA_Cloud:FS32K148HAT0MMHTFrom EasyEDA

Footprint

A1A2A3A4A5A6A7A8A9A10B1B2B3B4B5B6B7B8B9B10C1C2C3C4C5C6C7C8C9C10D1D2D3D4D5D6D7D8D9D10E1E2E3E4E5E6E7E8E9E10F1F2F3F4F5F6F7F8F9F10G1G2G3G4G5G6G7G8G9G10H1H2H3H4H5H6H7H8H9H10J1J2J3J4J5J6J7J8J9J10K1K2K3K4K5K6K7K8K9K10
EasyEDA_Cloud:LFBGA-100_L10.0-W10.0-R10-C10-P1.00-TLFrom EasyEDA

Pinout

100
The pins of the FS32K146HAT0VMHT
PinNameType
A1PTE11/LPSPI2_PCS0/LPTMR0_ALT1/FTM2_CH5/FXIO_D5/TRGMUX_OUT5Unspecified
A2PTE16/LPUART1_RTS/LPSPI2_SIN/FTM2_CH7/FTM4_FLT0/FXIO_D3/TRGMUX_OUT7Unspecified
A3PTA9/LPUART2_TX/LPSPI2_PCS0/FXIO_D7/FTM3_FLT2/FTM1_FLT3/FTM4_FLT0Unspecified
A4PTE1/LPSPI0_SIN/LPI2C0_HREQ/LPSPI1_PCS0/FTM1_FLT1Unspecified
A5PTA12/FTM1_CH6/CAN1_RX/FTM2_QD_PHBUnspecified
A6PTA13/FTM1_CH7/CAN1_TX/FTM2_QD_PHAUnspecified
A7PTE6/LPSPI0_PCS2/FTM3_CH7/LPUART1_RTS/ADC1_SE11Unspecified
A8PTA16/FTM1_CH3/LPSPI1_PCS2/ADC1_SE13Unspecified
A9PTA0/FTM2_CH1/LPI2C0_SCLS/FXIO_D2/FTM2_QD_PHA/LPUART0_CTS/TRGMUX_OUT3/ADC0_SE0/CMP0_IN0Unspecified
A10PTB8/FTM3_CH0Unspecified
B1PTD1/FTM0_CH3/LPSPI1_SIN/FTM2_CH1/FXIO_D1/TRGMUX_OUT2Unspecified
B2PTE15/LPUART1_CTS/LPSPI2_SCK/FTM2_CH6/FTM4_FLT1/FXIO_D2/TRGMUX_OUT6Unspecified
B3PTA8/LPUART2_RX/LPSPI2_SOUT/FXIO_D6/FTM3_FLT3/FTM4_FLT1Unspecified
B4PTE0/LPSPI0_SCK/TCLK1/LPSPI1_SOUT/FTM1_FLT2Unspecified
B5PTA11/FTM1_CH5/FXIO_D1/CMP0_RRTUnspecified
B6PTE2/LPSPI0_SOUT/LPTMR0_ALT3/FTM3_CH6/LPUART1_CTS/ADC1_SE10Unspecified
B7PTA15/FTM1_CH2/LPSPI0_PCS3/LPSPI2_PCS3/ADC1_SE12Unspecified
B8PTC7/LPUART1_TX/CAN1_TX/FTM3_CH3/FTM1_QD_PHA/ADC1_SE5Unspecified
B9PTA1/FTM1_CH1/LPI2C0_SDAS/FXIO_D3/FTM1_QD_PHA/LPUART0_RTS/TRGMUX_OUT0/ADC0_SE1/CMP0_IN1Unspecified
B10PTB10/FTM3_CH2/LPI2C0_SDASUnspecified
C1PTE10/CLKOUT/LPSPI2_PCS1/FTM2_CH4/FXIO_D4/TRGMUX_OUT4Unspecified
C2PTD0/FTM0_CH2/LPSPI1_SCK/FTM2_CH0/FXIO_D0/TRGMUX_OUT1Unspecified
C3PTA4/CMP0_OUT/EWM_OUT_b/JTAG_TMS/SWD_DIOUnspecified
C4PTA5/TCLK1/RESET_bUnspecified
C5PTA10/FTM1_CH4/FXIO_D0/JTAG_TDO/noetm_TRACE_SWOUnspecified
C6PTA14/FTM0_FLT0/FTM3_FLT1/EWM_IN/FTM1_FLT0Unspecified
C7PTC6/LPUART1_RX/CAN1_RX/FTM3_CH2/FTM1_QD_PHB/ADC1_SE4Unspecified
C8PTB9/FTM3_CH1/LPI2C0_SCLSUnspecified
C9PTB11/FTM3_CH3/LPI2C0_HREQUnspecified
C10PTA2/FTM3_CH0/LPI2C0_SDA/EWM_OUT_b/FXIO_D4/LPUART0_RX/ADC1_SE0Unspecified
D1PTE4/FTM2_QD_PHB/FTM2_CH2/CAN0_RX/FXIO_D6/EWM_OUT_bUnspecified
D2PTE5/TCLK2/FTM2_QD_PHA/FTM2_CH3/CAN0_TX/FXIO_D7/EWM_INUnspecified
D3PTE13/FTM4_CH5/LPSPI2_PCS2/FTM2_FLT0Unspecified
D4VSSUnspecified
D5PTC4/FTM1_CH0/RTC_CLKOUT/EWM_IN/FTM1_QD_PHB/JTAG_TCLK/SWD_CLK/CMP0_IN2Unspecified
D6PTC5/FTM2_CH0/RTC_CLKOUT/FTM2_QD_PHB/JTAG_TDIUnspecified
D7VSSUnspecified
D8PTA3/FTM3_CH1/LPI2C0_SCL/EWM_IN/FXIO_D5/LPUART0_TX/ADC1_SE1Unspecified
D9PTD2/FTM3_CH4/LPSPI1_SOUT/FXIO_D4/FXIO_D6/TRGMUX_IN5/ADC1_SE2Unspecified
D10PTD3/FTM3_CH5/LPSPI1_PCS0/FXIO_D5/FXIO_D7/TRGMUX_IN4/NMI_b/ADC1_SE3Unspecified
E1PTB7/LPI2C0_SCL/EXTALUnspecified
E2VREFLUnspecified
E3VREFHUnspecified
E4VDDAUnspecified
E5VDDUnspecified
E6VDDUnspecified
E7PTB17/FTM0_CH5/LPSPI1_PCS3/FTM5_FLT1Unspecified
E8PTB13/FTM0_CH1/FTM3_FLT1/CAN2_TX/ADC1_SE8/ADC0_SE8Unspecified
E9PTB12/FTM0_CH0/FTM3_FLT2/CAN2_RX/ADC1_SE7Unspecified
E10PTD4/FTM0_FLT3/FTM3_FLT3/ADC1_SE6Unspecified
F1PTB6/LPI2C0_SDA/XTALUnspecified
F2PTE3/FTM0_FLT0/LPUART2_RTS/FTM2_FLT0/TRGMUX_IN6/CMP0_OUTUnspecified
F3PTE14/FTM0_FLT1/FTM2_FLT1Unspecified
F4PTE12/FTM0_FLT3/LPUART2_TX/FTM5_FLT0Unspecified
F5VDDUnspecified
F6VDDUnspecified
F7PTA17/FTM0_CH6/FTM3_FLT0/EWM_OUT_b/FTM5_FLT0Unspecified
F8PTB16/FTM0_CH4/LPSPI1_SOUT/ADC1_SE15Unspecified
F9PTB15/FTM0_CH3/LPSPI1_SIN/ADC1_SE14Unspecified
F10PTB14/FTM0_CH2/LPSPI1_SCK/ADC1_SE9/ADC0_SE9Unspecified
G1PTD17/FTM0_FLT2/LPUART2_RX/FTM5_FLT1Unspecified
G2PTD16/FTM0_CH1/LPSPI0_SIN/CMP0_RRTUnspecified
G3PTD15/FTM0_CH0/LPSPI0_SCKUnspecified
G4VSSUnspecified
G5PTD11/FTM2_CH1/FTM2_QD_PHA/LPUART2_CTSUnspecified
G6PTC14/FTM1_CH2/LPSPI2_PCS0/TRGMUX_IN9/ADC0_SE12Unspecified
G7VSSUnspecified
G8PTC8/LPUART1_RX/FTM1_FLT0/FTM5_CH1/LPUART0_CTSUnspecified
G9PTA6/FTM0_FLT1/LPSPI1_PCS1/FTM5_CH5/LPUART1_CTS/ADC0_SE2Unspecified
G10PTE7/FTM0_CH7/FTM3_FLT0Unspecified
H1PTE9/FTM0_CH7/LPUART2_CTSUnspecified
H2PTD14/FTM2_CH5/LPUART1_TX/CLKOUTUnspecified
H3PTE8/FTM0_CH6/CMP0_IN3Unspecified
H4PTD12/FTM2_CH2/LPUART2_RTSUnspecified
H5PTC1/FTM0_CH1/LPSPI2_SOUT/FTM1_CH7/ADC0_SE9Unspecified
H6PTC15/FTM1_CH3/LPSPI2_SCK/TRGMUX_IN8/ADC0_SE13Unspecified
H7PTB3/FTM1_CH1/LPSPI0_SIN/FTM1_QD_PHA/TRGMUX_IN2/ADC0_SE7Unspecified
H8PTC11/FTM3_CH5/FTM4_CH2/TRGMUX_IN10Unspecified
H9PTC9/LPUART1_TX/FTM1_FLT1/FTM5_CH0/LPUART0_RTSUnspecified
H10PTA7/FTM0_FLT2/FTM5_CH3/RTC_CLKIN/LPUART1_RTS/ADC0_SE3Unspecified
J1PTD13/FTM2_CH4/LPUART1_RX/RTC_CLKOUTUnspecified
J2PTC3/FTM0_CH3/CAN0_TX/LPUART0_TX/ADC0_SE11/CMP0_IN4Unspecified
J3PTC2/FTM0_CH2/CAN0_RX/LPUART0_RX/ADC0_SE10/CMP0_IN5Unspecified
J4PTD6/LPUART2_RX/FTM2_FLT2/CMP0_IN7Unspecified
J5PTC0/FTM0_CH0/LPSPI2_SIN/FTM1_CH6/ADC0_SE8Unspecified
J6PTD8/FTM2_FLT2/FXIO_D1/FTM1_CH4Unspecified
J7PTC16/FTM1_FLT2/CAN2_RX/ADC0_SE14Unspecified
J8PTC13/FTM3_CH7/FTM2_CH7/LPUART2_RTSUnspecified
J9PTB1/LPUART0_TX/LPSPI0_SOUT/TCLK0/CAN0_TX/FTM4_CH5/ADC0_SE5/ADC1_SE15Unspecified
J10PTB0/LPUART0_RX/LPSPI0_PCS0/LPTMR0_ALT3/CAN0_RX/FTM4_CH6/ADC0_SE4/ADC1_SE14Unspecified
K1PTB5/FTM0_CH5/LPSPI0_PCS1/LPSPI0_PCS0/CLKOUT/TRGMUX_IN0Unspecified
K2PTB4/FTM0_CH4/LPSPI0_SOUT/TRGMUX_IN1Unspecified
K3PTD7/LPUART2_TX/FTM2_FLT3/CMP0_IN6Unspecified
K4PTD5/FTM2_CH3/LPTMR0_ALT2/FTM2_FLT1/TRGMUX_IN7Unspecified
K5PTD10/FTM2_CH0/FTM2_QD_PHB/CLKOUTUnspecified
K6PTD9/FXIO_D0/FTM2_FLT3/FTM1_CH5Unspecified
K7PTC17/FTM1_FLT3/CAN2_TX/ADC0_SE15Unspecified
K8PTB2/FTM1_CH0/LPSPI0_SCK/FTM1_QD_PHB/TRGMUX_IN3/ADC0_SE6Unspecified
K9PTC12/FTM3_CH6/FTM2_CH6/LPUART2_CTSUnspecified
K10PTC10/FTM3_CH4/TRGMUX_IN11Unspecified

Parts like it

8

Questions

Is there a KiCad symbol and footprint for the FS32K146HAT0VMHT?

Yes. The symbol is EasyEDA_Cloud:FS32K148HAT0MMHT and the footprint EasyEDA_Cloud:LFBGA-100_L10.0-W10.0-R10-C10-P1.00-TL, both drawn on this page. PCBKit places them on a board for you when you design with it.

What package is the FS32K146HAT0VMHT?

MAPBGA-100, with 100 pins. Its footprint is drawn on this page.

Where is the FS32K146HAT0VMHT datasheet?

NXP Semiconductors publishes it: the Datasheet link on this page opens it.

Where can I order the FS32K146HAT0VMHT?

JLCPCB lists it as part C3210481, with 0 in stock; the sellers' links on this page open their listings.

What can replace the FS32K146HAT0VMHT?

Parts like it in the library: the FS32K144HAT0MMHR by NXP Semiconductors, the FS32K144HAT0VMHR by NXP Semiconductors, the FS32K144HFT0MMHR by NXP Semiconductors and the FS32K144HRT0MMHR by NXP Semiconductors. Check their datasheets: a part that fits the footprint may still differ in its ratings.