TC6320TG-G

Microchip Technology

-55℃~+150℃ 1 N-Channel + 1 P-Channel 110pF 1V 200V 23pF 2A 8Ω@10V SOIC-8 MOSFETs ROHS

Extended

Datasheetmicrochip/TC6320TG-G

Category: MOSFETs
Package: SOIC-8
Pins: 8

Overview

The TC6320TG-G is a MOSFET made by Microchip Technology in a SOIC-8 package with 8 pins. -55℃~+150℃ 1 N-Channel + 1 P-Channel 110pF 1V 200V 23pF 2A 8Ω@10V SOIC-8 MOSFETs ROHS.

PCBKit's library has its KiCad symbol (EasyEDA_Cloud:TC2320TG-G, from EasyEDA) and its footprint (Package_SO:SOIC-8_3.9x4.9mm_P1.27mm, from KiCad's library), ready for a KiCad board. 1,092 are in stock at JLCPCB (part C624992). 7 open-source boards in 4 repositories on GitHub use it.

Symbol

EasyEDA_Cloud:TC2320TG-GFrom EasyEDA

Footprint

Package_SO:SOIC-8_3.9x4.9mm_P1.27mmFrom KiCad's library

From the datasheet

Works from: -55 °C · min operating ambient temperature · p. 5
Works up to: 150 °C · max operating ambient temperature · p. 5
Drain-source, most: 200 V · N-channel max drain-to-source voltage; min breakdown at VGS = 0V, ID = 2 mA · p. 4
Gate threshold: 2 V · N-channel max, VGS = VDS, ID = 1 mA · p. 4
Gate threshold: 2.4 V · P-channel max, VGS = VDS, ID = –1 mA · p. 5
On resistance: 8 Ω · N-channel max, VGS = 4.5V, ID = 150 mA · p. 4
On resistance: 7 Ω · N-channel max, VGS = 10V, ID = 1A · p. 4
On resistance: 10 Ω · P-channel max, VGS = –4.5V, ID = –150 mA · p. 5
Junction to air (8-lead SOIC): 101 K/W · typical, 1 oz., four-layer, 3” x 4” PCB · p. 5

What it is and has

Device type: N-Channel and P-Channel Enhancement-Mode MOSFET Pair · p. 1
Integrated resistor: Gate-to-source resistor · p. 1
Integrated clamp: Gate-to-source Zener diode · p. 1
Threshold: Low threshold · p. 1
On-resistance: Low on-resistance · p. 1
Package: 8-lead SOIC · p. 12
Environmental: Lead (Pb)-free/RoHS-compliant package · p. 12

Specifications

Parameter	Conditions	As printed	Page
Operating Ambient Temperature TA		min -55 · max 150 °C	4
Storage Temperature TS		min -55 · max 150 °C	4
Drain-to-source Breakdown Voltage BVDSS	TA = TJ = 25°C; VGS = 0V, ID = 2 mA	min 200 V	4
Gate Threshold Voltage VGS(th)	TA = TJ = 25°C; VGS = VDS, ID = 1 mA	min 1 · max 2 V	4
Change in VGS(th) with Temperature ∆VGS(th)	VGS = VDS, ID = 1 mA (Note 2)	max -4.5 mV/°C	4
Gate-to-source Shunt Resistor RGS	TA = TJ = 25°C; IGS = 100 uA	min 10 · max 50 kΩ	4
Gate-to-Source Zener Voltage VZGS	TA = TJ = 25°C; IGS = 2 mA	min 13.2 · max 25 V	4
Zero-gate Voltage Drain Current IDSS	TA = TJ = 25°C; VDS = Maximum rating, VGS = 0V	max 10 uA	4
Zero-gate Voltage Drain Current IDSS	VDS = 0.8 Maximum rating, VGS = 0V, TA = 125°C (Note 2)	max 1 mA	4
On-state Drain Current ID(ON)	TA = TJ = 25°C; VGS = 4.5V, VDS = 25V	min 1 A	4
On-state Drain Current ID(ON)	TA = TJ = 25°C; VGS = 10V, VDS = 25V	min 2 A	4
Static Drain-to-source On-state Resistance RDS(ON)	TA = TJ = 25°C; VGS = 4.5V, ID = 150 mA	max 8 Ω	4
Static Drain-to-source On-state Resistance RDS(ON)	TA = TJ = 25°C; VGS = 10V, ID = 1A	max 7 Ω	4
Change in RDS(ON) with Temperature ∆RDS(ON)	VGS = 4.5V, ID = 150 mA (Note 2)	max 1 %/°C	4
Forward Transconductance GFS	TA = TJ = 25°C; VDS = 25V, ID = 500 mA; Note 2	min 400 mmho	4
Input Capacitance CISS	TA = TJ = 25°C; VGS = 0V, VDS = 25V, f = 1 MHz; Note 2	max 110 pF	4
Common Source Output Capacitance COSS	TA = TJ = 25°C; VGS = 0V, VDS = 25V, f = 1 MHz; Note 2	max 60 pF	4
Reverse Transfer Capacitance CRSS	TA = TJ = 25°C; VGS = 0V, VDS = 25V, f = 1 MHz; Note 2	max 23 pF	4
Turn-on Delay Time td(ON)	TA = TJ = 25°C; VDD = 25V, ID = 1A, RGEN = 25Ω; Note 2	max 10 ns	4
Rise Time tr	TA = TJ = 25°C; VDD = 25V, ID = 1A, RGEN = 25Ω; Note 2	max 15 ns	4
Turn-off Delay Time td(OFF)	TA = TJ = 25°C; VDD = 25V, ID = 1A, RGEN = 25Ω; Note 2	max 20 ns	4
Fall Time tf	TA = TJ = 25°C; VDD = 25V, ID = 1A, RGEN = 25Ω; Note 2	max 15 ns	4
Diode Forward Voltage Drop VSD	TA = TJ = 25°C; VGS = 0V, ISD = 500 mA (Note 1)	max 1.8 V	4
Reverse Recovery Time trr	TA = TJ = 25°C; VGS = 0V, ISD = 500 mA (Note 2)	typ 300 ns	4
Drain-to-source Breakdown Voltage BVDSS	TA = TJ = 25°C; VGS = 0V, ID = –2 mA	min -200 V	5
Gate Threshold Voltage VGS(th)	TA = TJ = 25°C; VGS = VDS, ID = –1 mA	min -1 · max -2.4 V	5
Change in VGS(th) with Temperature ∆VGS(th)	VGS = VDS, ID = –1 mA (Note 2)	max 4.5 mV/°C	5
Gate-to-Source Zener Voltage VZGS	TA = TJ = 25°C; IGS = –2 mA	min 13.2 · max 25 V	5
Zero-gate Voltage Drain Current IDSS	TA = TJ = 25°C; VDS = Maximum rating, VGS = 0V	max -10 uA	5
Zero-gate Voltage Drain Current IDSS	VDS = 0.8 Maximum rating, VGS = 0V, TA = 125°C (Note 2)	max -1 mA	5
On-state Drain Current ID(ON)	TA = TJ = 25°C; VGS = –4.5V, VDS = –25V	min -1 A	5
On-state Drain Current ID(ON)	TA = TJ = 25°C; VGS = –10V, VDS = –25V	min -2 A	5
Static Drain-to-source On-state Resistance RDS(ON)	TA = TJ = 25°C; VGS = –4.5V, ID = –150 mA	max 10 Ω	5
Static Drain-to-source On-state Resistance RDS(ON)	TA = TJ = 25°C; VGS = –10V, ID = –1A	max 8 Ω	5
Change in RDS(ON) with Temperature ∆RDS(ON)	VGS = –10V, ID = –200 mA (Note 2)	max 1 %/°C	5
Forward Transconductance GFS	TA = TJ = 25°C; VDS = –25V, ID = –500 mA; Note 2	min 400 mmho	5
Input Capacitance CISS	TA = TJ = 25°C; VGS = 0V, VDS = –25V, f = 1 MHz; Note 2	max 200 pF	5
Common Source Output Capacitance COSS	TA = TJ = 25°C; VGS = 0V, VDS = –25V, f = 1 MHz; Note 2	max 55 pF	5
Reverse Transfer Capacitance CRSS	TA = TJ = 25°C; VGS = 0V, VDS = –25V, f = 1 MHz; Note 2	max 30 pF	5
Turn-on Delay Time td(ON)	TA = TJ = 25°C; VDD = –25V, ID = –1A, RGEN = 25Ω; Note 2	max 10 ns	5
Rise Time tr	TA = TJ = 25°C; VDD = –25V, ID = –1A, RGEN = 25Ω; Note 2	max 15 ns	5
Turn-off Delay Time td(OFF)	TA = TJ = 25°C; VDD = –25V, ID = –1A, RGEN = 25Ω; Note 2	max 20 ns	5
Fall Time tf	TA = TJ = 25°C; VDD = –25V, ID = –1A, RGEN = 25Ω; Note 2	max 15 ns	5
Diode Forward Voltage Drop VSD	TA = TJ = 25°C; VGS = 0V, ISD = –500 mA (Note 1)	max -1.8 V	5
Reverse Recovery Time trr	TA = TJ = 25°C; VGS = 0V, ISD = –500 mA (Note 2)	typ 300 ns	5
Operating Ambient Temperature TA		min -55 · max 150 °C	5
Storage Temperature TS		min -55 · max 150 °C	5
8-lead SOIC JA	8-lead SOIC; Note 1: 1 oz., four-layer, 3” x 4” PCB	typ 101 °C/W	5

Pins, by the datasheet

1 SN: Source N-channel. · p. 6
2 GN: Gate N-channel. · p. 6
3 SP: Source P-channel. · p. 6
4 GP: Gate P-channel. · p. 6
5 DP: Drain P-channel. · p. 6
6 DP: Drain P-channel. · p. 6
7 DN: Drain N-channel. · p. 6
8 DN: Drain N-channel. · p. 6

Ordering codes, by the datasheet

TC6320K6-G: 8-lead (4x4) VDFN · Lead (Pb)-free/RoHS-compliant; 3300/Reel · p. 12
TC6320TG-G: 8-lead SOIC · Lead (Pb)-free/RoHS-compliant; 3300/Reel · p. 12

Parameters

Current - Continuous Drain(Id): 2A
Drain to Source Voltage: 200V
Gate Threshold Voltage (Vgs(th)): 1V
Input Capacitance(Ciss): 110pF
Number: 1 N-Channel + 1 P-Channel
Operating Temperature: -55℃~+150℃
Output Capacitance(Coss): 60pF
RDS(on): 8Ω@10V
Reverse Transfer Capacitance (Crss@Vds): 23pF
Thermal Resistance(Junction to Ambient): 101℃/W
Type: N-Channel + P-Channel

Order codes

TC6320TG-GLCSC C624992

Pinout

The pins of the TC6320TG-G
Pin	Name	Type
1	SN	Unspecified
2	GN	Unspecified
3	SP	Unspecified
4	GP	Unspecified
5	DP	Unspecified
6	DP	Unspecified
7	DN	Unspecified
8	DN	Unspecified

Open-source boards using it

All 7

4 layers87.1 × 78.2 mm
3 in 1 Panel
kelu124/pic0rick
An rp2040-based acquisition board for pulse-echo ultrasound
115 parts116
4 layers120 × 80 mm
Ultr4rick
kelu124/ultr4rick
High-end version of the pic0rick
269 parts4
4 layers200 × 100 mm
MinUS
kelu124/minus
Minimal ultrasound platform
222 parts3
2 layers87 × 22.3 mm
Panel
kelu124/pic0rick
An rp2040-based acquisition board for pulse-echo ultrasound
46 parts116
2 layers63.3 × 22.3 mm
PMOD Pulser update
kelu124/pic0rick
An rp2040-based acquisition board for pulse-echo ultrasound
33 parts116
2 layers47 × 52.1 mm
DB pulser v3
echopen/PRJ-medtec_kit

17 parts19
2 layers45.7 × 52.1 mm
DB pulser v3
echopen/PRJ-medtec_kit

16 parts19

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Questions

Is there a KiCad symbol and footprint for the TC6320TG-G?

Yes. The symbol is EasyEDA_Cloud:TC2320TG-G and the footprint Package_SO:SOIC-8_3.9x4.9mm_P1.27mm, both drawn on this page. PCBKit places them on a board for you when you design with it.

What package is the TC6320TG-G?

SOIC-8, with 8 pins. Its footprint is drawn on this page.

Where is the TC6320TG-G datasheet?

Microchip Technology publishes it: the Datasheet link on this page opens it.

Where can I order the TC6320TG-G?

JLCPCB lists it as part C624992, with 1,092 in stock; the sellers' links on this page open their listings.

What can replace the TC6320TG-G?

Parts like it in the library: the IRF7820TRPBF by Infineon Technologies, the VBA1203M by VBsemi Elec, the SI4490DY by Vishay Intertechnology and the FDS2734 by onsemi. Check their datasheets: a part that fits the footprint may still differ in its ratings.

Which open-source boards use the TC6320TG-G?

7 boards in 4 repositories on GitHub; the most starred are listed on this page, with their KiCad files.

TC6320TG-G

Overview

Symbol

Footprint

From the datasheet

What it is and has

Specifications

Pins, by the datasheet

Ordering codes, by the datasheet

Parameters

Order codes

Pinout

Open-source boards using it

3 in 1 Panel

Ultr4rick

MinUS

Panel

PMOD Pulser update

DB pulser v3

DB pulser v3

Show this part on your page

Questions

Is there a KiCad symbol and footprint for the TC6320TG-G?

What package is the TC6320TG-G?

Where is the TC6320TG-G datasheet?

Where can I order the TC6320TG-G?

What can replace the TC6320TG-G?

Which open-source boards use the TC6320TG-G?

Parts like it

IRF7820TRPBF

VBA1203M

SI4490DY

FDS2734

AM4392N-T1-PF-VB

VBA1208N

FDS2734-NL-VB

IRF7820TRPBF-VB