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MCP4812-E/MS

Microchip TechnologyExtended

-40℃~+125℃ 10 2 2.7V~5.5V 3.5LSB 4.5us 415uA Integrated buffer、Power-on reset、Power-down mode、Multi-chip synchronization、Programmable gain、Built-in reference source SPI Voltage Buffer MSOP-8 Digital to Analog Converters (DAC) ROHS

Part id
microchip/MCP4812-E/MS
Category
Digital To Analog Converters (DAC)
Package
MSOP-8
Pins
8
In stock
39 at JLCPCB (C219484)

Overview

The MCP4812-E/MS is a digital To Analog Converter made by Microchip Technology in a MSOP-8 package with 8 pins. -40℃~+125℃ 10 2 2.7V~5.5V 3.5LSB 4.5us 415uA Integrated buffer、Power-on reset、Power-down mode、Multi-chip synchronization、Programmable gain、Built-in reference source SPI Voltage Buffer MSOP-8 Digital to Analog Converters (DAC) ROHS.

PCBKit's library has its KiCad symbol (Analog_DAC:MCP4812, from KiCad's library) and its footprint (Package_SO:MSOP-8_3x3mm_P0.65mm, from KiCad's library), ready for a KiCad board. 39 are in stock at JLCPCB (part C219484).

Symbol

CNTRLDACDACVdd1CS2SCK3SDI4LDAC5VB6Vss7VA8
Analog_DAC:MCP4812From KiCad's library

Footprint

12345678
Package_SO:MSOP-8_3x3mm_P0.65mmFrom KiCad's library

From the datasheet

11
Supply, least
2.7 V · VDD, recommended operating min · p. 3
Supply, most
5.5 V · VDD, recommended operating max · p. 3
Supply, absolute maximum
6.5 V · VDD, absolute max · p. 3
Works from
-40 °C · Operating ambient temperature min · p. 7
Works up to
125 °C · Operating ambient temperature max; reduced performance · p. 7
Junction, hottest
150 °C · Junction temperature absolute max · p. 3
Takes working
415 µA · VDD input current typical, outputs unloaded, code 0x000h · p. 3
Takes at most
750 µA · VDD input current max, outputs unloaded, code 0x000h · p. 3
Takes asleep
3.3 µA · Software shutdown current typical · p. 3
A pin gives at most
25 mA · Output pin current absolute max magnitude · p. 3
Junction to air (8L-MSOP)
211 K/W · Junction-to-ambient thermal resistance typical · p. 7

What it is and has

8
DAC
Dual 10-bit voltage output · p. 1
Output
Rail-to-rail · p. 1
SPI
20 MHz clock support · p. 1
Simultaneous update
Dual DAC latching with LDAC pin · p. 1
Settling time
4.5 µs · p. 1
Output gain
Selectable unity or 2x · p. 1
Internal voltage reference
2.048V · p. 1
Package options
8-pin PDIP, SOIC, MSOP · p. 1

Around it

2
cap 0.1 µF
between VDD and VSS; Ceramic bypass capacitor, in parallel with 10 uF tantalum; place within 4 mm of the device power pin. · p. 25
cap 10 µF
between VDD and VSS; Tantalum bypass capacitor, in parallel with 0.1 uF ceramic; place within 4 mm of the device power pin. · p. 25

Specifications

74
ParameterConditionsAs printedPage
VDD VDDmax 6.5 V3
Current at Input Pinsmin -2 · max 2 mA3
Current at Supply Pinsmin -50 · max 50 mA3
Current at Output Pinsmin -25 · max 25 mA3
Storage temperaturemin -65 · max 150 °C3
Ambient temp. with power appliedmin -55 · max 125 °C3
ESD protection on all pinsHBMmin 4 kV3
ESD protection on all pinsMMmin 400 V3
Maximum Junction Temperature TJmax 150 °C3
Input Voltage VDDmin 2.7 · max 5.5 V3
Input Current IDDAll digital inputs are grounded, all analog outputs (VOUT) are unloaded. Code = 0x000h; VDD = 5V; TA = -40 to +85°C; typical at +25°Ctyp 415 · max 750 uA3
Software Shutdown Current ISHDN_SWVDD = 5V; TA = -40 to +85°C; typical at +25°Ctyp 3.3 · max 6 uA3
Power-on Reset Threshold VPORtyp 2 V3
Resolution nMCP4812min 10 Bits3
INL Error INLMCP4812min -3.5 · max 3.5 LSb3
DNL DNLMCP4812; Note 1: Guaranteed monotonic by design over all codes.min -0.5 · max 0.5 LSb3
Offset Error VOSCode = 0x000hmin -1 · max 1 % of FSR3
Offset Error Temperature Coefficient VOS/°C-45°C to +25°Ctyp 0.16 ppm/°C3
Offset Error Temperature Coefficient VOS/°C+25°C to +85°Ctyp -0.44 ppm/°C3
Gain Error gECode = 0xFFFh, not including offset errormin -2 · typ -0.1 · max 2 % of FSR3
Gain Error Temperature Coefficient G/°Ctyp -3 ppm/°C3
Internal Reference Voltage VREFVOUTA when G = 1x and Code = 0xFFFhmin 2.008 · typ 2.048 · max 2.088 V4
Temperature Coefficient (Note 2) VREF/°C-40°C to 0°Ctyp 125 · max 325 ppm/°C4
Temperature Coefficient (Note 2) VREF/°C-40°C to 0°Ctyp 0.25 · max 0.65 LSb/°C4
Temperature Coefficient (Note 2) VREF/°C0°C to +85°Ctyp 45 · max 160 ppm/°C4
Temperature Coefficient (Note 2) VREF/°C0°C to +85°Ctyp 0.09 · max 0.32 LSb/°C4
Output Noise (VREF Noise) ENREF0.1-10 Hz; Code = 0xFFFh, G = 1xtyp 290 uVp-p4
Output Noise Density eNREF1 kHz; Code = 0xFFFh, G = 1xtyp 1.2 uV/Hz4
Output Noise Density eNREF10 kHz; Code = 0xFFFh, G = 1xtyp 1 uV/Hz4
1/f Corner Frequency fCORNERtyp 400 Hz4
Phase Margin PMCL= 400 pF, RL = typ 66 Degree (°)4
Slew Rate SRtyp 0.55 V/us4
Short Circuit Current ISCtyp 15 · max 24 mA4
Settling Time tSETTLINGWithin 1/2 LSb of final value from 1/4 to 3/4 full-scale rangetyp 4.5 us4
Major Code Transition GlitchNote 2; 1 LSb change around major carry (0111 1111 to 1000 0000)typ 45 nV-s4
Input Voltage VDDTypical values at +125°C by characterization or simulationmin 2.7 · max 5.5 V5
Input Current IDDVDD = 5V; +125°C by characterization or simulation; all digital inputs grounded, all analog outputs unloaded, Code = 0x000htyp 440 uA5
Software Shutdown Current ISHDN_SW+125°C by characterization or simulationtyp 5 uA5
Power-On Reset threshold VPOR+125°C by characterization or simulationtyp 1.85 V5
Resolution nMCP4812; +125°C by characterization or simulationmin 10 Bits5
Offset Error Temperature Coefficient VOS/°C+25°C to +125°Ctyp -5 ppm/°C5
Gain Error gE+125°C by characterization or simulation; Code = 0xFFFh, not including offset errortyp -0.1 % of FSR5
Gain Error Temperature Coefficient G/°C+125°C by characterization or simulationtyp -3 ppm/°C5
Internal Reference Voltage VREF+125°C by characterization or simulation; VOUTA when G = 1x and Code = 0xFFFhtyp 2.048 V5
Temperature Coefficient (Note 2) VREF/°C-40°C to 0°Ctyp 125 ppm/°C5
Temperature Coefficient (Note 2) VREF/°C-40°C to 0°Ctyp 0.25 LSb/°C5
Temperature Coefficient (Note 2) VREF/°C0°C to +85°Ctyp 45 ppm/°C5
Temperature Coefficient (Note 2) VREF/°C0°C to +85°Ctyp 0.09 LSb/°C5
Output Noise (VREF Noise) ENREF+125°C by characterization or simulation; 0.1 – 10 Hz; Code = 0xFFFh, G = 1xtyp 290 uVp-p5
Output Noise Density eNREF+125°C by characterization or simulation; 1 kHz; Code = 0xFFFh, G = 1xtyp 1.2 uV/Hz5
Output Noise Density eNREF+125°C by characterization or simulation; 10 kHz; Code = 0xFFFh, G = 1xtyp 1 uV/Hz5
1/f Corner Frequency fCORNER+125°C by characterization or simulationtyp 400 Hz5
Phase Margin PM+125°C by characterization or simulation; CL= 400 pF, RL = typ 66 Degree (°)6
Slew Rate SR+125°C by characterization or simulationtyp 0.55 V/us6
Short Circuit Current ISC+125°C by characterization or simulationtyp 17 mA6
Settling Time tSETTLING+125°C by characterization or simulation; within 1/2 LSb of final value from 1/4 to 3/4 full-scale rangetyp 4.5 us6
Major Code Transition Glitch+125°C by characterization or simulation; Note 2; 1 LSb change around major carry (0111 1111 to 1000 0000)typ 45 nV-s6
Input Leakage Current ILEAKAGELDAC = CS = SDI = SCK = VDD or VSSmin -1 · max 1 A6
Digital Pin Capacitance (All inputs/outputs) CIN, COUTVDD = 5.0V, TA = +25°C, fCLK = 1 MHz (Note 1)typ 10 pF6
Clock Frequency FCLKTA = +25°C (Note 1)max 20 MHz6
Clock High Time tHINote 1min 15 ns6
Clock Low Time tLONote 1min 15 ns6
CS Fall to First Rising CLK Edge tCSSRApplies only when CS falls with CLK high. (Note 1)min 40 ns6
Data Input Setup Time tSUNote 1min 15 ns6
Data Input Hold Time tHDNote 1min 10 ns6
SCK Rise to CS Rise Hold Time tCHSNote 1min 15 ns6
CS High Time tCSHNote 1min 15 ns7
LDAC Pulse Width tLDNote 1min 100 ns7
LDAC Setup Time tLSNote 1min 40 ns7
SCK Idle Time before CS Fall tIDLENote 1min 40 ns7
Specified Temperature Range TAmin -40 · max 125 °C7
Operating Temperature Range TANote 1: Reduced performance; TJ must not exceed +150°C.min -40 · max 125 °C7
Storage Temperature Range TAmin -65 · max 150 °C7
Thermal Resistance, 8L-MSOP JA8L-MSOPtyp 211 °C/W7

Pins, by the datasheet

8
1 VDD
Supply voltage input, 2.7V to 5.5V. · p. 15
2 CS
Active-low chip select input enables serial clock and data functions. · p. 15
3 SCK
SPI compatible serial clock input. · p. 15
4 SDI
SPI compatible serial data input. · p. 15
5 LDAC
Synchronization input transfers input registers to output registers; low updates both outputs simultaneously and may be tied to VSS. · p. 15
6 VOUTB
DACB output with its own output amplifier. · p. 15
7 VSS
Ground reference and current return; connect to a ground plane through a low-impedance connection. · p. 15
8 VOUTA
DACA output with its own output amplifier. · p. 15

Parts like it

8

Questions

Is there a KiCad symbol and footprint for the MCP4812-E/MS?

Yes. The symbol is Analog_DAC:MCP4812 and the footprint Package_SO:MSOP-8_3x3mm_P0.65mm, both drawn on this page. PCBKit places them on a board for you when you design with it.

What package is the MCP4812-E/MS?

MSOP-8, with 8 pins. Its footprint is drawn on this page.

Where is the MCP4812-E/MS datasheet?

Microchip Technology publishes it: the Datasheet link on this page opens it.

Where can I order the MCP4812-E/MS?

JLCPCB lists it as part C219484, with 39 in stock; the sellers' links on this page open their listings.

What can replace the MCP4812-E/MS?

Parts like it in the library: the DAC8551IDGKR by Texas Instruments, the TPC116S1-VR by 3PEAK, the DAC8571IDGKR by Texas Instruments and the MCP4822-E/MS by Microchip Technology. Check their datasheets: a part that fits the footprint may still differ in its ratings.