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PCBKitNew board
M2GL010-1FGG484 on a board, in 3D

M2GL010-1FGG484

Microchip Technology

0℃~+85℃ 1.14V~2.625V 12084 233 933888bit IGLOO2 Supports SEU error detection and correction、Supports AES encryption FPBGA-484 Programmable Logic Device (CPLDs/FPGAs) ROHS

Extended
DatasheetJLCPCBLCSCmicrochip/M2GL010-1FGG484
Category
Programmable Logic Device (CPLDs, FPGAs)
Package
FPBGA-484
Pins
484

Overview

The M2GL010-1FGG484 is a programmable Logic Device made by Microchip Technology in a FPBGA-484 package with 484 pins. 0℃~+85℃ 1.14V~2.625V 12084 233 933888bit IGLOO2 Supports SEU error detection and correction、Supports AES encryption FPBGA-484 Programmable Logic Device (CPLDs/FPGAs) ROHS.

PCBKit's library has its KiCad symbol (Logic:M2GL010T-1FGG484, from CERN's library) and its footprint (ICs And Semiconductors SMD_BGA:BGA484C100P22X22_2300X2300X240, from CERN's library), ready for a KiCad board. JLCPCB lists it (part C2615099).

Symbol

BANK 0DDRIO29PB0/MDDR_ADDR14D18DDRIO29NB0/MDDR_ADDR15E18DDRIO30PB0/MDDR_ADDR12E19DDRIO30NB0/MDDR_ADDR13D20DDRIO31PB0/MDDR_ADDR10A21DDRIO31NB0/MDDR_ADDR11B21DDRIO32PB0/MDDR_ADDR8E17DDRIO32NB0/MDDR_ADDR9F17DDRIO33PB0/MDDR_ODTC20DDRIO33NB0/MDDR_ADDR7C19DDRIO34PB0/MDDR_ADDR5B19DDRIO34NB0/MDDR_ADDR6A20DDRIO35PB0/MDDR_ADDR3C17DDRIO35NB0/MDDR_ADDR4C18DDRIO36PB0/MDDR_ADDR1D16DDRIO36NB0/MDDR_ADDR2E16DDRIO37PB0/MDDR_BA2C16DDRIO37NB0/MDDR_ADDR0B17DDRIO38PB0/MDDR_BA0A18DDRIO38NB0/MDDR_BA1A19DDRIO39PB0/MDDR_CLKA16DDRIO39NB0/MDDR_CLK_NA17DDRIO40PB0/MDDR_RST_NE15DDRIO40NB0/MDDR_CAS_NF15DDRIO41PB0/MDDR_CKEB15DDRIO41NB0/MDDR_CS_NC15DDRIO42PB0/MDDR_RAS_NF14DDRIO42NB0/MDDR_WE_NG14DDRIO43PB0/MDDR_DQ14D14DDRIO43NB0/MDDR_DQ15E13DDRIO44PB0/MDDR_DQ12A14DDRIO44NB0/MDDR_DQ13A15DDRIO45PB0/MDDR_FIFO_WE_IN1G12DDRIO45NB0/MDDR_DM_RDQS1G13DDRIO46PB0/MDDR_DQS1B13DDRIO46NB0/MDDR_DQS1_NC13DDRIO47PB0/MDDR_DQ10D12DDRIO47NB0/MDDR_DQ11D13DDRIO48PB0/MDDR_DQ8A12DDRIO48NB0/MDDR_DQ9A13DDRIO49PB0/MDDR_DQ7E12DDRIO49NB0/MDDR_FIFO_WE_OUT1F12DDRIO50PB0/MDDR_DQ5D10DDRIO50NB0/MDDR_DQ6D11DDRIO51PB0/MDDR_DM_RDQS0A10DDRIO51NB0/MDDR_DQ4A11DDRIO52PB0/MDDR_DQS0B11DDRIO52NB0/MDDR_DQS0_NC11DDRIO53PB0/MDDR_DQ2F10DDRIO53NB0/MDDR_DQ3E10DDRIO54PB0/MDDR_DQ0B9DDRIO54NB0/MDDR_DQ1A9DDRIO55PB0/CCC_NE0_CLKI3/QDR0D9DDRIO55NB0/QDR1C9DDRIO56PB0/MDDR_DQ_ECC0A7DDRIO56NB0/MDDR_DQ_ECC1A8DDRIO57PB0/MDDR_FIFO_WE_IN_ECCE8DDRIO57NB0/MDDR_DM_RDQS4_ECCD8DDRIO58PB0/MDDR_DQS_ECCC7DDRIO58NB0/MDDR_DQS_ECC_NB7DDRIO59PB0/GB0B6DDRIO59NB0/GB4A6DDRIO60PB0/MDDR_FIFO_WE_OUT_ECCE7DDRIO60NB0/CCC_NE1_CLKI3F8DDRIO61PB0C5DDRIO61NB0D6DDRIO62PB0B5DDRIO62NB0A5DDRIO63PB0A4DDRIO63NB0A3
Logic:M2GL010T-1FGG484From CERN's library

Footprint

A1A2A3A4A5A6A7A8A9A10A11A12A13A14A15A16A17A18A19A20A21A22AA1AA2AA3AA4AA5AA6AA7AA8AA9AA10AA11AA12AA13AA14AA15AA16AA17AA18AA19AA20AA21AA22AB1AB2AB3AB4AB5AB6AB7AB8AB9AB10AB11AB12AB13AB14AB15AB16AB17AB18AB19AB20AB21AB22B1B2B3B4B5B6B7B8B9B10B11B12B13B14B15B16B17B18B19B20B21B22C1C2C3C4C5C6C7C8C9C10C11C12C13C14C15C16C17C18C19C20C21C22D1D2D3D4D5D6D7D8D9D10D11D12D13D14D15D16D17D18D19D20D21D22E1E2E3E4E5E6E7E8E9E10E11E12E13E14E15E16E17E18E19E20E21E22F1F2F3F4F5F6F7F8F9F10F11F12F13F14F15F16F17F18F19F20F21F22G1G2G3G4G5G6G7G8G9G10G11G12G13G14G15G16G17G18G19G20G21G22H1H2H3H4H5H6H7H8H9H10H11H12H13H14H15H16H17H18H19H20H21H22J1J2J3J4J5J6J7J8J9J10J11J12J13J14J15J16J17J18J19J20J21J22K1K2K3K4K5K6K7K8K9K10K11K12K13K14K15K16K17K18K19K20K21K22L1L2L3L4L5L6L7L8L9L10L11L12L13L14L15L16L17L18L19L20L21L22M1M2M3M4M5M6M7M8M9M10M11M12M13M14M15M16M17M18M19M20M21M22N1N2N3N4N5N6N7N8N9N10N11N12N13N14N15N16N17N18N19N20N21N22P1P2P3P4P5P6P7P8P9P10P11P12P13P14P15P16P17P18P19P20P21P22R1R2R3R4R5R6R7R8R9R10R11R12R13R14R15R16R17R18R19R20R21R22T1T2T3T4T5T6T7T8T9T10T11T12T13T14T15T16T17T18T19T20T21T22U1U2U3U4U5U6U7U8U9U10U11U12U13U14U15U16U17U18U19U20U21U22V1V2V3V4V5V6V7V8V9V10V11V12V13V14V15V16V17V18V19V20V21V22W1W2W3W4W5W6W7W8W9W10W11W12W13W14W15W16W17W18W19W20W21W22Y1Y2Y3Y4Y5Y6Y7Y8Y9Y10Y11Y12Y13Y14Y15Y16Y17Y18Y19Y20Y21Y22
ICs And Semiconductors SMD_BGA:BGA484C100P22X22_2300X2300X240From CERN's library

Parameters

7
Features
Supports SEU error detection and correction；Supports AES encryption
Number of I/O
233
Number of Logic Elements/Blocks
12084
Operating Temperature
0℃~+85℃
Series
IGLOO2
Total RAM capacity
933888bit
Voltage - Supply
1.14V~2.625V

Order codes

2

Pinout

484
The pins of the M2GL010-1FGG484
PinNameType
A1VSSPower in
A2MSIO69NB7Input/output
A3DDRIO63NB0Input/output
A4DDRIO63PB0Input/output
A5DDRIO62NB0Input/output
A6DDRIO59NB0/GB4Input/output
A7DDRIO56PB0/MDDR_DQ_ECC0Input/output
A8DDRIO56NB0/MDDR_DQ_ECC1Input/output
A9DDRIO54NB0/MDDR_DQ1Input/output
A10DDRIO51PB0/MDDR_DM_RDQS0Input/output
A11DDRIO51NB0/MDDR_DQ4Input/output
A12DDRIO48PB0/MDDR_DQ8Input/output
A13DDRIO48NB0/MDDR_DQ9Input/output
A14DDRIO44PB0/MDDR_DQ12Input/output
A15DDRIO44NB0/MDDR_DQ13Input/output
A16DDRIO39PB0/MDDR_CLKInput/output
A17DDRIO39NB0/MDDR_CLK_NInput/output
A18DDRIO38PB0/MDDR_BA0Input/output
A19DDRIO38NB0/MDDR_BA1Input/output
A20DDRIO34NB0/MDDR_ADDR6Input/output
A21DDRIO31PB0/MDDR_ADDR10Input/output
A22VSSPower in
AA1VSSPower in
AA2SERDES_0_TXD0_NOutput
AA3VSSPower in
AA4SERDES_0_TXD1_NOutput
AA5VSSPower in
AA6SERDES_0_TXD2_NOutput
AA7VSSPower in
AA8SERDES_0_TXD3_NOutput
AA9VSSPower in
AA10NCPassive
AA11NCPassive
AA12NCPassive
AA13MSIO106PB4Input/output
AA14VSSPower in
AA15MSIO110NB4Input/output
AA16MSIO114PB4Input/output
AA17MSIO114NB4Input/output
AA18MSIO113NB4Input/output
AA19VDDI4Power in
AA20XTLOSC_AUX_EXTALPassive
AA21XTLOSC_MAIN_EXTALPassive
AA22JTAGSELInput
AB1VSSPower in
AB2SERDES_0_TXD0_POutput
AB3VSSPower in
AB4SERDES_0_TXD1_POutput
AB5VSSPower in
AB6SERDES_0_TXD2_POutput
AB7VSSPower in
AB8SERDES_0_TXD3_POutput
AB9VSSPower in
AB10NCPassive
AB11NCPassive
AB12VDDI4Power in
AB13MSIO105PB4/CCC_NE0_CLKI0Input/output
AB14MSIO105NB4Input/output
AB15MSIO110PB4Input/output
AB16VSSPower in
AB17MSIO113PB4Input/output
AB18MSIO118PB4Input/output
AB19MSIO118NB4Input/output
AB20XTLOSC_AUX_XTALPassive
AB21XTLOSC_MAIN_XTALPassive
AB22VSSPower in
B1MSIO71NB7Input/output
B2MSIO69PB7Input/output
B3MSIO65NB7Input/output
B4VSSPower in
B5DDRIO62PB0Input/output
B6DDRIO59PB0/GB0Input/output
B7DDRIO58NB0/MDDR_DQS_ECC_NInput/output
B8VDDI0Power in
B9DDRIO54PB0/MDDR_DQ0Input/output
B10VSSPower in
B11DDRIO52PB0/MDDR_DQS0Input/output
B12VDDI0Power in
B13DDRIO46PB0/MDDR_DQS1Input/output
B14VSSPower in
B15DDRIO41PB0/MDDR_CKEInput/output
B16VDDI0Power in
B17DDRIO37NB0/MDDR_ADDR0Input/output
B18VSSPower in
B19DDRIO34PB0/MDDR_ADDR5Input/output
B20VDDI0Power in
B21DDRIO31NB0/MDDR_ADDR11Input/output
B22MSIO27NB1Input/output
C1MSIO71PB7Input/output
C2VDDI7Power in
C3MSIO65PB7Input/output
C4MSIO64PB7Input/output
C5DDRIO61PB0Input/output
C6VDDI0Power in
C7DDRIO58PB0/MDDR_DQS_ECCInput/output
C8VSSPower in
C9DDRIO55NB0/QDR1Input/output
C10VDDI0Power in
C11DDRIO52NB0/MDDR_DQS0_NInput/output
C12VSSPower in
C13DDRIO46NB0/MDDR_DQS1_NInput/output
C14VDDI0Power in
C15DDRIO41NB0/MDDR_CS_NInput/output
C16DDRIO37PB0/MDDR_BA2Input/output
C17DDRIO35PB0/MDDR_ADDR3Input/output
C18DDRIO35NB0/MDDR_ADDR4Input/output
C19DDRIO33NB0/MDDR_ADDR7Input/output
C20DDRIO33PB0/MDDR_ODTInput/output
C21VSSPower in
C22MSIO27PB1Input/output
D1MSIO72PB7Input/output
D2MSIO72NB7Input/output
D3MSIO68PB7Input/output
D4MSIO68NB7Input/output
D5MSIO64NB7Input/output
D6DDRIO61NB0Input/output
D7MDDR_IMP_CALIB_ECCPassive
D8DDRIO57NB0/MDDR_DM_RDQS4_ECCInput/output
D9DDRIO55PB0/CCC_NE0_CLKI3/QDR0Input/output
D10DDRIO50PB0/MDDR_DQ5Input/output
D11DDRIO50NB0/MDDR_DQ6Input/output
D12DDRIO47PB0/MDDR_DQ10Input/output
D13DDRIO47NB0/MDDR_DQ11Input/output
D14DDRIO43PB0/MDDR_DQ14Input/output
D15VSSPower in
D16DDRIO36PB0/MDDR_ADDR1Input/output
D17VDDI0Power in
D18DDRIO29PB0/MDDR_ADDR14Input/output
D19VSSPower in
D20DDRIO30NB0/MDDR_ADDR13Input/output
D21MSI26NB1Input/output
D22FLASH_GOLDEN_NInput
E1MSIO73PB7Input/output
E2MSIO73NB7Input/output
E3VSSPower in
E4MSIO70PB7Input/output
E5MSIO70NB7Input/output
E6VSSPower in
E7DDRIO60PB0/MDDR_FIFO_WE_OUT_ECCInput/output
E8DDRIO57PB0/MDDR_FIFO_WE_IN_ECCInput/output
E9VSSPower in
E10DDRIO53NB0/MDDR_DQ3Input/output
E11VDDI0Power in
E12DDRIO49PB0/MDDR_DQ7Input/output
E13DDRIO43NB0/MDDR_DQ15Input/output
E14VSSPower in
E15DDRIO40PB0/MDDR_RST_NInput/output
E16DDRIO36NB0/MDDR_ADDR2Input/output
E17DDRIO32PB0/MDDR_ADDR8Input/output
E18DDRIO29NB0/MDDR_ADDR15Input/output
E19DDRIO30PB0/MDDR_ADDR12Input/output
E20VDDI1Power in
E21MSIO25NB1Input/output
E22MSIO25PB1Input/output
F1VDDI7Power in
F2NCPassive
F3MSIO74PB7Input/output
F4MSIO74NB7Input/output
F5MSIO67PB7Input/output
F6MSIO67NB7Input/output
F7VDDI0Power in
F8DDRIO60NB0/CCC_NE1_CLKI3Input/output
F9VDDI0Power in
F10DDRIO53PB0/MDDR_DQ2Input/output
F11VSSPower in
F12DDRIO49NB0/MDDR_FIFO_WE_OUT1Input/output
F13VDDI0Power in
F14DDRIO42PB0/MDDR_RAS_NInput/output
F15DDRIO40NB0/MDDR_CAS_NInput/output
F16VSSPower in
F17DDRIO32NB0/MDDR_ADDR9Input/output
F18MSIO24NB1Input/output
F19MSIO24PB1Input/output
F20MSIO23NB1Input/output
F21MSIO23PB1Input/output
F22VDDI1Power in
G1MSIO78NB7Input/output
G2NCPassive
G3NCPassive
G4VDDI7Power in
G5MSIO66PB7Input/output
G6MSIO66NB7Input/output
G7MSIO75NB7Input/output
G8NCPassive
G9NCPassive
G10VREF0Power in
G11VREF0Power in
G12DDRIO45PB0/MDDR_FIFO_WE_IN1Input/output
G13DDRIO45NB0/MDDR_DM_RDQS1Input/output
G14DDRIO42NB0/MDDR_WE_NInput/output
G15VREF0Power in
G16MSIO28NB1Input/output
G17MSIO28PB1Input/output
G18MSIO22NB1Input/output
G19MSIO22PB1/GB6Input/output
G20VSSPower in
G21NCPassive
G22NCPassive
H1MSIO78PB7/GB2Input/output
H2VSSPower in
H3NCPassive
H4MSIO77PB7Input/output
H5MSIO77NB7Input/output
H6MSIO76PB7Input/output
H7MSIO75PB7Input/output
H8NCPassive
H9VSSPower in
H10VDDPower in
H11VSSPower in
H12VDDI0Power in
H13VSSPower in
H14VDDI0Power in
H15CCC_NE0_PLL_VDDAPower in
H16MSS_MDDR_PLL_VDDAPower in
H17MSS_MDDR_PLL_VSSAPower in
H18VDDI1Power in
H19MSIO21NB1Input/output
H20MSIO21PB1/GB5Input/output
H21NCPassive
H22NCPassive
J1MSIO80PB7Input/output
J2MSIO80NB7Input/output
J3MSIO79PB7/GB1Input/output
J4MSIO79NB7Input/output
J5VSSPower in
J6MSIO76NB7Input/output
J7VDDI7Power in
J8NCPassive
J9VDDPower in
J10VSSPower in
J11VDDPower in
J12VSSPower in
J13VDDPower in
J14VSSPower in
J15CCC_NE0_PLL_VSSAPower in
J16CCC_NE1_PLL_VSSAPower in
J17CCC_NE1_PLL_VDDAPower in
J18MSIO20NB2Input/output
J19NCPassive
J20NCPassive
J21VDDI1Power in
J22NCPassive
K1MSIOD85PB6/CCC_NE1_CLKI1Input/output
K2MSIOD85NB6Input/output
K3VDDI6Power in
K4MSIOD82PB6Input/output
K5MSIOD82NB6Input/output
K6MSIO81PB7Input/output
K7MSIO81NB7Input/output
K8MSIOD83PB6Input/output
K9VSSPower in
K10VDDPower in
K11VSSPower in
K12VDDPower in
K13VSSPower in
K14VDDPower in
K15MSIO18NB2Input/output
K16MSIO19NB2Input/output
K17MSIO19PB2Input/output
K18MSIO20PB2Input/output
K19VSSPower in
K20MSIO17NB2Input/output
K21MSIO17PB2Input/output
K22NCPassive
L1VSSPower in
L2MSIOD86PB6Input/output
L3MSIOD86NB6Input/output
L4MSIOD87PB6Input/output
L5MSIOD87NB6Input/output
L6VDDI6Power in
L7MSIOD84NB6Input/output
L8MSIOD83NB6Input/output
L9VDDPower in
L10VSSPower in
L11VDDPower in
L12VSSPower in
L13VDDPower in
L14VSSPower in
L15VPPPower in
L16MSIO18PB2Input/output
L17VDDI2Power in
L18MSIO16NB2Input/output
L19MSIO16PB2Input/output
L20MSIO15NB2Input/output
L21MSIO15PB2Input/output
L22VSSPower in
M1MSIOD92NB6Input/output
M2MSIOD90NB6Input/output
M3MSIOD90PB6Input/output
M4VSSPower in
M5MSIOD88PB6Input/output
M6MSIOD88NB6Input/output
M7MSIOD84PB6/CCC_NE1_CLKI2Input/output
M8MSIOD95NB6Input/output
M9VSSPower in
M10VDDPower in
M11VSSPower in
M12VDDPower in
M13VSSPower in
M14VDDPower in
M15VPPNVMPower in
M16NCPassive
M17NCPassive
M18NCPassive
M19NCPassive
M20VDDI2Power in
M21MSIO14PB2Input/output
M22MSIO14NB2Input/output
N1MSIOD92PB6Input/output
N2VDDI6Power in
N3MSIOD91PB6Input/output
N4MSIOD91NB6Input/output
N5MSIOD89PB6Input/output
N6MSIOD89NB6Input/output
N7VSSPower in
N8MSIOD95PB6Input/output
N9VDDPower in
N10VSSPower in
N11VDDPower in
N12VSSPower in
N13VDDPower in
N14VSSPower in
N15VSSNVMPower in
N16MSIO8PB2Input/output
N17MSIO8NB2Input/output
N18VSSPower in
N19MSIO12PB2/SPI_0_CLKInput/output
N20MSIO12NB2/SPI_0_SDIInput/output
N21MSIO13PB2/SPI_0_SDOInput/output
N22MSIO13NB2/SPI_0_SS0Input/output
P1MSIOD94PB6Input/output
P2MSIOD94NB6Input/output
P3MSIOD93NB6Input/output
P4MSIOD93PB6Input/output
P5VDDI6Power in
P6MSIOD96PB6Input/output
P7MSIOD96NB6Input/output
P8SERDES_0_VDD_1Power in
P9VSSPower in
P10VDDPower in
P11VSSPower in
P12VDDPower in
P13VSSPower in
P14VDDPower in
P15VPPPower in
P16MSIO7NB2Input/output
P17MSIO6PB2Input/output
P18MSIO6NB2Input/output
P19SC_SPI_SDOOutput
P20SC_SPI_SSInput
P21VSSPower in
P22MSIO11PB2/CCC_NE0_CLKI1Input/output
R1MSIOD97NB6Input/output
R2MSIOD97PB6Input/output
R3MSIOD98PB6Input/output
R4MSIOD98NB6Input/output
R5VSSPower in
R6NCPassive
R7NCPassive
R8SERDES_0_L01_VDDAIOPower in
R9VSSPower in
R10VSSPower in
R11VDDPower in
R12VSSPower in
R13VDDPower in
R14VSSPower in
R15DEVRST_NInput
R16MSIO7PB2Input/output
R17MSIO1PB2Input/output
R18MSIO1NB2Input/output
R19VDDI2Power in
R20SC_SPI_CLKInput/output
R21SC_SPI_SDIInput
R22MSIO11NB2/CCC_NE0_CLKI2Input/output
T1MSIOD100NB5/SERDES_0_REFCLK0_NInput/output
T2VSSPower in
T3MSIOD99NB6Input/output
T4MSIOD99PB6Input/output
T5NCPassive
T6SERDES_0_PLL_VSSAPower in
T7NCPassive
T8SERDES_0_PLL_VDDAPower in
T9SERDES_0_VDD_2Power in
T10SERDES_0_L23_VDDAIOPower in
T11NCPassive
T12NCPassive
T13MSIO107NB4Input/output
T14VDDI4Power in
T15VSSPower in
T16NCPassive
T17VSSPower in
T18MSIO2PB2Input/output
T19MSIO2NB2Input/output
T20MSIO5PB2Input/output
T21MSIO5NB2Input/output
T22VDDI2Power in
U1MSIOD100PB5/SERDES_0_REFCLK0_PInput/output
U2VDDI5Power in
U3MSIOD101PB5/SERDES_0_REFCLK1_PInput/output
U4MSIOD101NB5/SERDES_0_REFCLK1_NInput/output
U5SERDES_0_L01_REXTPower in
U6SERDES_0_L01_REFRETPower in
U7SERDES_0_L01_VDDAPLLPower in
U8SERDES_0_L23_VDDAPLLPower in
U9VPPPower in
U10NCPassive
U11NCPassive
U12VSSPower in
U13MSIO107PB4Input/output
U14MSIO112PB4Input/output
U15MSIO112NB4Input/output
U16NCPassive
U17NCPassive
U18NCPassive
U19MSIO0PB2Input/output
U20VSSPower in
U21MSIO4NB2Input/output
U22MSIO4PB2Input/output
V1VSSPower in
V2VSSPower in
V3VSSPower in
V4VSSPower in
V5VSSPower in
V6VSSPower in
V7VSSPower in
V8SERDES_0_L23_REXTPower in
V9SERDES_0_L23_REFRETPower in
V10VDDI4Power in
V11MSIO104PB4/GB3Input/output
V12NCPassive
V13MSIO108PB4Input/output
V14MSIO108NB4Input/output
V15VSSPower in
V16MSIO115NB4Input/output
V17NCPassive
V18NCPassive
V19MSIO0NB2Input/output
V20JTAG_TMSInput
V21MSIO3NB2Input/output
V22MSIO3PB2Input/output
W1SERDES_0_RXD0_PInput
W2VSSPower in
W3SERDES_0_RXD1_PInput
W4VSSPower in
W5SERDES_0_RXD2_PInput
W6VSSPower in
W7SERDES_0_RXD3_PInput
W8VSSPower in
W9MSIO102PB4Input/output
W10MSIO103PB4/PROBE_AInput/output
W11MSIO104NB4/GB7Input/output
W12NCPassive
W13VDDI4Power in
W14MSIO109NB4Input/output
W15MSIO111NB4Input/output
W16MSIO115PB4Input/output
W17MSIO116NB4Input/output
W18VSSPower in
W19NCPassive
W20JTAG_TCKInput
W21VDDI3Power in
W22JTAG_TDIInput
Y1SERDES_0_RXD0_NInput
Y2VSSPower in
Y3SERDES_0_RXD1_NInput
Y4VSSPower in
Y5SERDES_0_RXD2_NInput
Y6VSSPower in
Y7SERDES_0_RXD3_NInput
Y8VSSPower in
Y9MSIO102NB4/CCC_NE1_CLKI0Input/output
Y10MSIO103NB4/PROBE_BInput/output
Y11VSSPower in
Y12NCPassive
Y13MSIO106NB4Input/output
Y14MSIO109PB4Input/output
Y15MSIO111PB4Input/output
Y16VDDI4Power in
Y17MSIO116PB4Input/output
Y18MSIO117PB4Input/output
Y19MSIO117NB4Input/output
Y20NCPassive
Y21JTAG_TDOOutput
Y22JTAG_TRSTBPassive

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Questions

Is there a KiCad symbol and footprint for the M2GL010-1FGG484?

Yes. The symbol is Logic:M2GL010T-1FGG484 and the footprint ICs And Semiconductors SMD_BGA:BGA484C100P22X22_2300X2300X240, both drawn on this page. PCBKit places them on a board for you when you design with it.

What package is the M2GL010-1FGG484?

FPBGA-484, with 484 pins. Its footprint is drawn on this page.

Where is the M2GL010-1FGG484 datasheet?

Microchip Technology publishes it: the Datasheet link on this page opens it.

Where can I order the M2GL010-1FGG484?

JLCPCB lists it as part C2615099, with 0 in stock; the sellers' links on this page open their listings.

What can replace the M2GL010-1FGG484?

Parts like it in the library: the XC6SLX45-2FGG484C by AMD/XILINX, the XC7Z020-1CLG484I by AMD/XILINX, the EP4CE75U19I7N by Intel/Altera and the PGL50G-6IFBG484 by Pangomicro. Check their datasheets: a part that fits the footprint may still differ in its ratings.

Parts like it

8