DS31408GN2
Microchip TechnologyExtended
-40℃~+85℃ 1.8V Programmable clock output、Watchdog timer、Timestamp function CSBGA-256(17x17) Application Specific Clock/Timing ROHS
- Part id
- microchip/DS31408GN2
- Category
- Clock, Timing, Application Specific
- Package
- CSBGA-256(17x17)
- Pins
- 256
- In stock
- 0 at JLCPCB (C1542278)
Overview
The DS31408GN2 is a clock, Timing, Application Specific made by Microchip Technology in a CSBGA-256(17x17) package with 256 pins. -40℃~+85℃ 1.8V Programmable clock output、Watchdog timer、Timestamp function CSBGA-256(17x17) Application Specific Clock/Timing ROHS.
PCBKit's library has its KiCad symbol (EasyEDA_Cloud:DS31408GN2, from EasyEDA) and its footprint (EasyEDA_Cloud:FTBGA-256_L17.0-W17.0-R16-C16-P1.00-TL, from EasyEDA), ready for a KiCad board. JLCPCB lists it (part C1542278).
Symbol
Footprint
Pinout
256| Pin | Name | Type |
|---|---|---|
| A1 | SCLK | Unspecified |
| A2 | IC8POS | Unspecified |
| A3 | IC7POS | Unspecified |
| A4 | IC6POS | Unspecified |
| A5 | IC5POS | Unspecified |
| A6 | IC4POS | Unspecified |
| A7 | IC3POS | Unspecified |
| A8 | IC2POS | Unspecified |
| A9 | IC1POS | Unspecified |
| A10 | N.C | Unspecified |
| A11 | VDD_DIG_18 | Unspecified |
| A12 | VDD_DIG_18 | Unspecified |
| A13 | VDD_APLL1_18 | Unspecified |
| A14 | VSS_APLL1 | Unspecified |
| A15 | VDD_APLL1_18 | Unspecified |
| A16 | VSS_APLL1 | Unspecified |
| B1 | SDI | Unspecified |
| B2 | IC8NEG | Unspecified |
| B3 | IC7NEG | Unspecified |
| B4 | IC6NEG | Unspecified |
| B5 | IC5NEG | Unspecified |
| B6 | IC4NEG | Unspecified |
| B7 | IC3NEG | Unspecified |
| B8 | IC2NEG | Unspecified |
| B9 | IC1NEG | Unspecified |
| B10 | N.C. | Unspecified |
| B11 | VSS_DIG | Unspecified |
| B12 | VSS_DIG | Unspecified |
| B13 | VSS_APLL1 | Unspecified |
| B14 | VSS_APLL1 | Unspecified |
| B15 | VDD_APLL1_18 | Unspecified |
| B16 | OC1NEG | Unspecified |
| C1 | CPOL | Unspecified |
| C2 | CPHA | Unspecified |
| C3 | SDO | Unspecified |
| C4 | CS_N | Unspecified |
| C5 | SYNC1 | Unspecified |
| C6 | SYNC2 | Unspecified |
| C7 | TEST3 | Unspecified |
| C8 | SRFAIL | Unspecified |
| C9 | N.C. | Unspecified |
| C10 | N.C. | Unspecified |
| C11 | N.C. | Unspecified |
| C12 | VSS_APLL1 | Unspecified |
| C13 | VDD_APLL1_33 | Unspecified |
| C14 | VSS_APLL1 | Unspecified |
| C15 | VDD_APLL1_33 | Unspecified |
| C16 | OC1POS | Unspecified |
| D1 | MCLKOSCP | Unspecified |
| D2 | MCLKOSCN | Unspecified |
| D3 | OSCFREQ0 | Unspecified |
| D4 | VDD_IO_18 | Unspecified |
| D5 | VDD_IO_18 | Unspecified |
| D6 | VDD_IO_33 | Unspecified |
| D7 | VDD_IO_33 | Unspecified |
| D8 | VDD_IO_33 | Unspecified |
| D9 | VSS_IO | Unspecified |
| D10 | VSS_IO | Unspecified |
| D11 | VSS_IO | Unspecified |
| D12 | VDD_IO_18 | Unspecified |
| D13 | VDD_IO_18 | Unspecified |
| D14 | VSS_APLL1 | Unspecified |
| D15 | VDD_APLL1_33 | Unspecified |
| D16 | VDD_APLL1_33 | Unspecified |
| E1 | VDD_MCPLL_18 | Unspecified |
| E2 | VSS_MCPLL | Unspecified |
| E3 | OSCFREQ1 | Unspecified |
| E4 | VDD_IO_33 | Unspecified |
| E5 | VDD_DIG_18 | Unspecified |
| E6 | VDD_DIG_18 | Unspecified |
| E7 | VDD_DIG_18 | Unspecified |
| E8 | VDD_DIG_18 | Unspecified |
| E9 | VDD_DIG_18 | Unspecified |
| E10 | VDD_DIG_18 | Unspecified |
| E11 | VDD_DIG_18 | Unspecified |
| E12 | VDD_DIG_18 | Unspecified |
| E13 | VDD_IO_33 | Unspecified |
| E14 | VSS_APLL2 | Unspecified |
| E15 | VDD_APLL2_18 | Unspecified |
| E16 | N.C. | Unspecified |
| F1 | VDD_MCPLL_18 | Unspecified |
| F2 | VSS_MCPLL | Unspecified |
| F3 | OSCFREQ2 | Unspecified |
| F4 | VDD_IO_33 | Unspecified |
| F5 | VDD_DIG_18 | Unspecified |
| F6 | VSS_DIG | Unspecified |
| F7 | VSS_DIG | Unspecified |
| F8 | VSS_DIG | Unspecified |
| F9 | VSS_DIG | Unspecified |
| F10 | VSS_DIG | Unspecified |
| F11 | VSS_DIG | Unspecified |
| F12 | VSS_DIG | Unspecified |
| F13 | VSUB | Unspecified |
| F14 | VSS_APLL2 | Unspecified |
| F15 | VDD_APLL2_18 | Unspecified |
| F16 | VSS_APLL2 | Unspecified |
| G1 | VDD_MCPLL_18 | Unspecified |
| G2 | VSS_MCPLL | Unspecified |
| G3 | RST_N | Unspecified |
| G4 | VSUB | Unspecified |
| G5 | VDD_DIG_18 | Unspecified |
| G6 | VSS_DIG | Unspecified |
| G7 | VSS_DIG | Unspecified |
| G8 | VSS_DIG | Unspecified |
| G9 | VSS_DIG | Unspecified |
| G10 | VSS_DIG | Unspecified |
| G11 | VSS_DIG | Unspecified |
| G12 | VSS_DIG | Unspecified |
| G13 | VSUB | Unspecified |
| G14 | VSS_APLL2 | Unspecified |
| G15 | VDD_APLL2_18 | Unspecified |
| G16 | OC2NEG | Unspecified |
| H1 | VDD_MCPLL_33 | Unspecified |
| H2 | VSS_MCPLL | Unspecified |
| H3 | GPIO1 | Unspecified |
| H4 | VSUB | Unspecified |
| H5 | VDD_DIG_18 | Unspecified |
| H6 | VSS_DIG | Unspecified |
| H7 | VSS_DIG | Unspecified |
| H8 | VSS_DIG | Unspecified |
| H9 | VSS_DIG | Unspecified |
| H10 | VSS_DIG | Unspecified |
| H11 | VSS_DIG | Unspecified |
| H12 | VSS_DIG | Unspecified |
| H13 | VSUB | Unspecified |
| H14 | VSS_APLL2 | Unspecified |
| H15 | VDD_APLL2_33 | Unspecified |
| H16 | OC2POS | Unspecified |
| J1 | VDD_MCPLL_33 | Unspecified |
| J2 | VSS_MCPLL | Unspecified |
| J3 | GPIO2 | Unspecified |
| J4 | VSUB | Unspecified |
| J5 | VDD_DIG_18 | Unspecified |
| J6 | VSS_DIG | Unspecified |
| J7 | VSS_DIG | Unspecified |
| J8 | VSS_DIG | Unspecified |
| J9 | VSS_DIG | Unspecified |
| J10 | VSS_DIG | Unspecified |
| J11 | VSS_DIG | Unspecified |
| J12 | VSS_DIG | Unspecified |
| J13 | VSUB | Unspecified |
| J14 | VSS_APLL2 | Unspecified |
| J15 | VDD_APLL2_33 | Unspecified |
| J16 | VDD_APLL2_33 | Unspecified |
| K1 | GPIO4 | Unspecified |
| K2 | LOCK | Unspecified |
| K3 | GPIO3 | Unspecified |
| K4 | VSUB | Unspecified |
| K5 | VDD_DIG_18 | Unspecified |
| K6 | VSS_DIG | Unspecified |
| K7 | VSS_DIG | Unspecified |
| K8 | VSS_DIG | Unspecified |
| K9 | VSS_DIG | Unspecified |
| K10 | VSS_DIG | Unspecified |
| K11 | VSS_DIG | Unspecified |
| K12 | VSS_DIG | Unspecified |
| K13 | VSUB | Unspecified |
| K14 | VSS_APLL3 | Unspecified |
| K15 | VDD_APLL3_18 | Unspecified |
| K16 | N.C | Unspecified |
| L1 | INTREQ | Unspecified |
| L2 | SRCSW | Unspecified |
| L3 | TEST0 | Unspecified |
| L4 | VDD_IO_33 | Unspecified |
| L5 | VDD_DIG_18 | Unspecified |
| L6 | VSS_DIG | Unspecified |
| L7 | VSS_DIG | Unspecified |
| L8 | VSS_DIG | Unspecified |
| L9 | VSS_DIG | Unspecified |
| L10 | VSS_DIG | Unspecified |
| L11 | VSS_DIG | Unspecified |
| L12 | VSS_DIG | Unspecified |
| L13 | VSUB | Unspecified |
| L14 | VSS_APLL3 | Unspecified |
| L15 | VDD_APLL3_18 | Unspecified |
| L16 | VSS_APLL3 | Unspecified |
| M1 | TEST1 | Unspecified |
| M2 | TEST2 | Unspecified |
| M3 | JTRST_N | Unspecified |
| M4 | VDD_IO_33 | Unspecified |
| M5 | VDD_DIG_18 | Unspecified |
| M6 | VDD_DIG_18 | Unspecified |
| M7 | VDD_DIG_18 | Unspecified |
| M8 | VDD_DIG_18 | Unspecified |
| M9 | VDD_DIG_18 | Unspecified |
| M10 | VDD_DIG_18 | Unspecified |
| M11 | VDD_DIG_18 | Unspecified |
| M12 | VDD_DIG_18 | Unspecified |
| M13 | VDD_IO_33 | Unspecified |
| M14 | VSS_APLL3 | Unspecified |
| M15 | VDD_APLL3_18 | Unspecified |
| M16 | OC3NEG | Unspecified |
| N1 | JTCLK | Unspecified |
| N2 | JTDI | Unspecified |
| N3 | JTDO | Unspecified |
| N4 | VDD_IO_18 | Unspecified |
| N5 | VDD_IO_18 | Unspecified |
| N6 | VDD_IO_33 | Unspecified |
| N7 | VDD_IO_33 | Unspecified |
| N8 | VDD_IO_33 | Unspecified |
| N9 | VSS_IO | Unspecified |
| N10 | VSS_IO | Unspecified |
| N11 | VSS_IO | Unspecified |
| N12 | VDD_IO_18 | Unspecified |
| N13 | VDD_IO_18 | Unspecified |
| N14 | VSS_APLL3 | Unspecified |
| N15 | VDD_APLL3_33 | Unspecified |
| N16 | OC3POS | Unspecified |
| P1 | JTMS | Unspecified |
| P2 | FSYNC | Unspecified |
| P3 | MFSYNC | Unspecified |
| P4 | N.C. | Unspecified |
| P5 | N.C. | Unspecified |
| P6 | OC7 | Unspecified |
| P7 | OC6 | Unspecified |
| P8 | OC5 | Unspecified |
| P9 | OC4 | Unspecified |
| P10 | OC3 | Unspecified |
| P11 | OC2 | Unspecified |
| P12 | OC1 | Unspecified |
| P13 | N.C. | Unspecified |
| P14 | VSS_APLL3 | Unspecified |
| P15 | VDD_APLL3_33 | Unspecified |
| P16 | VDD_APLL3_33 | Unspecified |
| R1 | VSS_OC | Unspecified |
| R2 | OC7POS | Unspecified |
| R3 | VSS_OC | Unspecified |
| R4 | OC6POS | Unspecified |
| R5 | VSS_OC | Unspecified |
| R6 | OC5POS | Unspecified |
| R7 | VSS_OC | Unspecified |
| R8 | OC4POS | Unspecified |
| R9 | VSS_OC | Unspecified |
| R10 | VSS_OC | Unspecified |
| R11 | VSS_OC | Unspecified |
| R12 | VSS_OC | Unspecified |
| R13 | VSS_OC | Unspecified |
| R14 | VSS_OC | Unspecified |
| R15 | VSS_OC | Unspecified |
| R16 | VSS_DIG | Unspecified |
| T1 | VDD_OC_18 | Unspecified |
| T2 | OC7NEG | Unspecified |
| T3 | VDD_OC_18 | Unspecified |
| T4 | OC6NEG | Unspecified |
| T5 | VDD_OC_18 | Unspecified |
| T6 | OC5NEG | Unspecified |
| T7 | VDD_OC_18 | Unspecified |
| T8 | OC4NEG | Unspecified |
| T9 | VDD_OC_18 | Unspecified |
| T10 | VDD_OC_18 | Unspecified |
| T11 | VDD_OC_18 | Unspecified |
| T12 | VDD_OC_18 | Unspecified |
| T13 | VDD_OC_18 | Unspecified |
| T14 | VDD_OC_18 | Unspecified |
| T15 | VDD_OC_18 | Unspecified |
| T16 | VDD_DIG_18 | Unspecified |
Questions
Is there a KiCad symbol and footprint for the DS31408GN2?
Yes. The symbol is EasyEDA_Cloud:DS31408GN2 and the footprint EasyEDA_Cloud:FTBGA-256_L17.0-W17.0-R16-C16-P1.00-TL, both drawn on this page. PCBKit places them on a board for you when you design with it.
What package is the DS31408GN2?
CSBGA-256(17x17), with 256 pins. Its footprint is drawn on this page.
Where is the DS31408GN2 datasheet?
Microchip Technology publishes it: the Datasheet link on this page opens it.
Where can I order the DS31408GN2?
JLCPCB lists it as part C1542278, with 0 in stock; the sellers' links on this page open their listings.