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25AA080AT-I/SN

Microchip TechnologyExtended

-40℃~+85℃ 1,000,000 cycles 1.8V~5.5V 10MHz 200 Years 5ms 8Kbit Hardware write protection function、Built-in write enable latch (WEL)、Power-down/Power-up protection circuit SPI SOIC-8 EEPROM ROHS

Part id
microchip/25AA080AT-I/SN
Category
EEPROM
Package
SOIC-8
Pins
8
In stock
48 at JLCPCB (C615739)

Overview

The 25AA080AT-I/SN is an EEPROM made by Microchip Technology in a SOIC-8 package with 8 pins. -40℃~+85℃ 1,000,000 cycles 1.8V~5.5V 10MHz 200 Years 5ms 8Kbit Hardware write protection function、Built-in write enable latch (WEL)、Power-down/Power-up protection circuit SPI SOIC-8 EEPROM ROHS.

PCBKit's library has its KiCad symbol (EasyEDA_Cloud:CAT25C128S, from EasyEDA) and its footprint (Package_SO:SOIC-8_3.9x4.9mm_P1.27mm, from KiCad's library), ready for a KiCad board. 48 are in stock at JLCPCB (part C615739).

Symbol

1CS#2SO3WP#4VSS5SI6SCK7HOLD#8VCC
EasyEDA_Cloud:CAT25C128SFrom EasyEDA

Footprint

12345678
Package_SO:SOIC-8_3.9x4.9mm_P1.27mmFrom KiCad's library

From the datasheet

9
Supply, least
1.8 V · VCC, recommended operating min · p. 1
Supply, most
5.5 V · VCC, recommended operating max · p. 1
Supply, absolute maximum
7 V · VCC, absolute max · p. 2
Works from
-40 °C · Industrial operating ambient min · p. 1
Works up to
85 °C · Industrial operating ambient max · p. 1
Takes working
6 mA · VCC read current max, 5.5 V, 10 MHz, SO open · p. 2
Takes at most
6 mA · VCC read current max, 5.5 V, 10 MHz, SO open · p. 2
Takes asleep
5 µA · Standby current max, CS = VCC = 5.5 V · p. 2
Takes asleep
1 µA · Standby current max, CS = VCC = 2.5 V · p. 2

What it is and has

15
Memory
8K SPI Bus Serial EEPROM · p. 1
Memory organization
1024 x 8-bit · p. 1
Page size
16 byte · p. 1
Maximum clock
10 MHz · p. 1
Write cycle time
5 ms max. · p. 1
Write operation
Self-timed ERASE and WRITE cycles · p. 1
Block write protection
Protect none, 1/4, 1/2 or all of array · p. 1
Protection
Power-on/off data protection circuitry · p. 1
Protection
Write enable latch · p. 1
Protection
Write-protect pin · p. 1
Read operation
Sequential read · p. 1
Endurance
1,000,000 erase/write cycles · p. 1
Data retention
> 200 years · p. 1
ESD protection
> 4000V · p. 1
Compliance
Pb-free and RoHS compliant · p. 1

Specifications

64
ParameterConditionsAs printedPage
VCC VCCmax 7 V2
All inputs and outputs w.r.t. VSSMaximum: VCC +1.0Vmin -0.6 V2
Storage temperaturemin -65 · max 150 °C2
Ambient temperature under biasmin -65 · max 125 °C2
ESD protection on all pinsmax 4 kV2
High-level input voltage VIH1VCC ≥ 2.7V (Note); maximum VCC +1min 2 V2
Low-level input voltage VIL1VCC ≥ 2.7V (Note)min -0.3 · max 0.8 V2
Low-level input voltage VIL2VCC < 2.7V (Note); maximum 0.2 VCCmin -0.3 V2
Low-level output voltage VOLIOL = 2.1 mAmax 0.4 V2
Low-level output voltage VOLIOL = 1.0 mA, VCC < 2.5Vmax 0.2 V2
Input leakage current ILICS = VCC, VIN = VSS TO VCC; maximum listed as ±1max 1 uA2
Output leakage current ILOCS = VCC, VOUT = VSS TO VCC; maximum listed as ±1max 1 uA2
Internal Capacitance (all inputs and outputs) CINTTAMB = 25°C, CLK = 1.0 MHz, VCC = 5.0V (Note)max 7 pF2
Operating Current ICC ReadVCC = 5.5V; FCLK = 10.0 MHz; SO = Openmax 6 mA2
Operating Current ICC ReadVCC = 2.5V; FCLK = 5.0 MHz; SO = Openmax 2.5 mA2
Operating Current ICC WriteVCC = 5.5Vmax 3 mA2
Standby Current IccsCS = VCC = 5.5V, Inputs tied to VCC or VSS, TAMB = -40°C TO +125°Cmax 5 uA2
Standby Current IccsCS = VCC = 2.5V, Inputs tied to VCC or VSS, TAMB = -40°C TO +85°Cmax 1 uA2
Clock Frequency FCLK4.5V ≤ VCC ≤ 5.5Vmax 10 MHz3
Clock Frequency FCLK2.5V ≤ VCC < 4.5Vmax 5 MHz3
Clock Frequency FCLK1.8V ≤ VCC < 2.5Vmax 3 MHz3
CS Setup Time TCSS4.5V ≤ VCC ≤ 5.5Vmin 50 ns3
CS Setup Time TCSS2.5V ≤ VCC < 4.5Vmin 100 ns3
CS Setup Time TCSS1.8V ≤ VCC < 2.5Vmin 150 ns3
CS Hold Time TCSH4.5V ≤ VCC ≤ 5.5Vmin 100 ns3
CS Hold Time TCSH2.5V ≤ VCC < 4.5Vmin 200 ns3
CS Hold Time TCSH1.8V ≤ VCC < 2.5Vmin 250 ns3
CS Disable Time TCSDmin 50 ns3
Data Setup Time Tsu4.5V ≤ VCC ≤ 5.5Vmin 10 ns3
Data Setup Time Tsu2.5V ≤ VCC < 4.5Vmin 20 ns3
Data Setup Time Tsu1.8V ≤ VCC < 2.5Vmin 30 ns3
Data Hold Time THD4.5V ≤ VCC ≤ 5.5Vmin 20 ns3
Data Hold Time THD2.5V ≤ VCC < 4.5Vmin 40 ns3
Data Hold Time THD1.8V ≤ VCC < 2.5Vmin 50 ns3
CLK Rise Time TRNote 1max 500 ns3
CLK Fall Time TFNote 1max 500 ns3
Clock High Time THI4.5V ≤ VCC ≤ 5.5Vmin 50 ns3
Clock High Time THI2.5V ≤ VCC < 4.5Vmin 100 ns3
Clock High Time THI1.8V ≤ VCC < 2.5Vmin 150 ns3
Clock Low Time TLO4.5V ≤ VCC ≤ 5.5Vmin 50 ns3
Clock Low Time TLO2.5V ≤ VCC < 4.5Vmin 100 ns3
Clock Low Time TLO1.8V ≤ VCC < 2.5Vmin 150 ns3
Clock Delay Time TCLDmin 50 ns3
Clock Enable Time TCLEmin 50 ns3
Output Valid from Clock Low TV4.5V ≤ VCC ≤ 5.5Vmax 50 ns3
Output Valid from Clock Low TV2.5V ≤ VCC < 4.5Vmax 100 ns3
Output Valid from Clock Low TV1.8V ≤ VCC < 2.5Vmax 160 ns3
Output Hold Time THONote 1min 0 ns3
Output Disable Time TDIS4.5V ≤ VCC ≤ 5.5V (Note 1)max 40 ns3
Output Disable Time TDIS2.5V ≤ VCC < 4.5V (Note 1)max 80 ns3
Output Disable Time TDIS1.8V ≤ VCC < 2.5V (Note 1)max 160 ns3
HOLD Setup Time THS4.5V ≤ VCC ≤ 5.5Vmin 20 ns3
HOLD Setup Time THS2.5V ≤ VCC < 4.5Vmin 40 ns3
HOLD Setup Time THS1.8V ≤ VCC < 2.5Vmin 80 ns3
HOLD Hold Time THH4.5V ≤ VCC ≤ 5.5Vmin 20 ns4
HOLD Hold Time THH2.5V ≤ VCC < 4.5Vmin 40 ns4
HOLD Hold Time THH1.8V ≤ VCC < 2.5Vmin 80 ns4
HOLD Low to Output High-Z THZ4.5V ≤ VCC ≤ 5.5V (Note 1)min 30 ns4
HOLD Low to Output High-Z THZ2.5V ≤ VCC < 4.5V (Note 1)min 60 ns4
HOLD Low to Output High-Z THZ1.8V ≤ VCC < 2.5V (Note 1)min 160 ns4
HOLD High to Output Valid THV4.5V ≤ VCC ≤ 5.5Vmin 30 ns4
HOLD High to Output Valid THV2.5V ≤ VCC < 4.5Vmin 60 ns4
HOLD High to Output Valid THV1.8V ≤ VCC < 2.5Vmin 160 ns4
Internal Write Cycle Time TWCNote 3max 5 ms4

Pins, by the datasheet

8
1 CS
Chip Select Input; low selects the device, high deselects it and forces Standby mode. · p. 13
2 SO
Serial Data Output; read data shifts out after the falling edge of the serial clock. · p. 13
3 WP
Write-Protect Pin; when low with WPEN high, disables writes to nonvolatile Status Register bits. · p. 13
4 VSS
Ground. · p. 13
5 SI
Serial Data Input; receives instructions, addresses and data on the rising edge of the serial clock. · p. 13
6 SCK
Serial Clock Input; synchronizes communication, latching SI on rising edges and updating SO after falling edges. · p. 13
7 HOLD
Hold Input; suspends serial transmission; hold high when unused and change while SCK is low. · p. 13
8 VCC
Supply Voltage. · p. 13

Parts like it

8

Questions

Is there a KiCad symbol and footprint for the 25AA080AT-I/SN?

Yes. The symbol is EasyEDA_Cloud:CAT25C128S and the footprint Package_SO:SOIC-8_3.9x4.9mm_P1.27mm, both drawn on this page. PCBKit places them on a board for you when you design with it.

What package is the 25AA080AT-I/SN?

SOIC-8, with 8 pins. Its footprint is drawn on this page.

Where is the 25AA080AT-I/SN datasheet?

Microchip Technology publishes it: the Datasheet link on this page opens it.

Where can I order the 25AA080AT-I/SN?

JLCPCB lists it as part C615739, with 48 in stock; the sellers' links on this page open their listings.

What can replace the 25AA080AT-I/SN?

Parts like it in the library: the M95512-WMN6TP by STMicroelectronics, the 25LC080AT-I/SN by Microchip Technology, the 25LC128T-I/SN by Microchip Technology and the 25LC640AT-I/SN by Microchip Technology. Check their datasheets: a part that fits the footprint may still differ in its ratings.