| Output Swing | RIGHT LEG DRIVE AMPLIFIER (A2); RL = 50 kΩ; upper limit +VS − 0.1 V | min 0.1 V | 4 |
| Short-Circuit Current IOUT | RIGHT LEG DRIVE AMPLIFIER (A2) | typ 11 mA | 4 |
| Integrator Input Resistor | RIGHT LEG DRIVE AMPLIFIER (A2) | min 120 · typ 150 · max 180 kΩ | 4 |
| Gain Bandwidth Product GDP | RIGHT LEG DRIVE AMPLIFIER (A2) | typ 100 kHz | 4 |
| Offset Error VOS | REFERENCE BUFFER (A3); RL > 50 kΩ | typ 1 mV | 4 |
| Input Bias Current IB | REFERENCE BUFFER (A3) | typ 100 pA | 4 |
| Short-Circuit Current Limit IOUT | REFERENCE BUFFER (A3) | typ 12 mA | 4 |
| Voltage Range | REFERENCE BUFFER (A3); RL = 50 kΩ; upper limit +VS − 0.7 V | min 0.1 V | 4 |
| Hysteresis | DC LEADS OFF COMPARATORS | typ 60 mV | 4 |
| Propagation Delay | DC LEADS OFF COMPARATORS | typ 0.5 us | 4 |
| Square Wave Frequency FAC | AC LEADS OFF DETECTOR | min 50 · typ 100 · max 175 kHz | 4 |
| Square Wave Amplitude IAC | AC LEADS OFF DETECTOR | typ 200 nA p-p | 4 |
| Impedance Threshold | AC LEADS OFF DETECTOR; Between +IN and −IN | min 10 · typ 20 MΩ | 4 |
| Detection Delay | AC LEADS OFF DETECTOR | typ 110 us | 4 |
| On Resistance RON | FAST RESTORE CIRCUIT; Switches S1 and S2 | min 8 · typ 10 · max 12 kΩ | 4 |
| Off Leakage | FAST RESTORE CIRCUIT; Switches S1 and S2 | typ 100 pA | 4 |
| Threshold Voltage | FAST RESTORE CIRCUIT; Window Comparator; From either rail | typ 50 mV | 4 |
| Propagation Delay | FAST RESTORE CIRCUIT; Window Comparator | typ 2 us | 4 |
| Feedback Recovery Switch On Time tSW1 | FAST RESTORE CIRCUIT; Switch Timing Characteristics | typ 110 ms | 4 |
| Filter Recovery Switch On Time tSW2 | FAST RESTORE CIRCUIT; Switch Timing Characteristics | typ 55 ms | 4 |
| Fast Restore Reset tRST | FAST RESTORE CIRCUIT; Switch Timing Characteristics | typ 2 us | 4 |
| Low VIL | LOGIC INTERFACE; Input Voltage (AC/DC and FR) | typ 1.24 V | 4 |
| High VIH | LOGIC INTERFACE; Input Voltage (AC/DC and FR) | typ 1.35 V | 4 |
| Low VIL | LOGIC INTERFACE; Input Voltage (SDN) | typ 2.1 V | 4 |
| High VIH | LOGIC INTERFACE; Input Voltage (SDN) | typ 0.5 V | 4 |
| Low VOL | LOGIC INTERFACE; Output Voltage; LOD+ and LOD− terminals | typ 0.05 V | 4 |
| High VOH | LOGIC INTERFACE; Output Voltage; LOD+ and LOD− terminals | typ 2.95 V | 4 |
| Quiescent Supply Current | SYSTEM SPECIFICATIONS | typ 170 · max 230 uA | 4 |
| Quiescent Supply Current | SYSTEM SPECIFICATIONS; TA = 0°C to 70°C | typ 210 uA | 4 |
| Shutdown Current | SYSTEM SPECIFICATIONS | typ 40 · max 500 nA | 4 |
| Shutdown Current | SYSTEM SPECIFICATIONS; TA = 0°C to 70°C | typ 100 nA | 4 |
| Supply Range | SYSTEM SPECIFICATIONS | min 2 · max 3.5 V | 4 |
| Specified Temperature Range | SYSTEM SPECIFICATIONS | min 0 · max 70 °C | 4 |
| Operational Temperature Range | SYSTEM SPECIFICATIONS | min -40 · max 85 °C | 4 |
| Supply Voltage | | max 3.6 V | 5 |
| Minimum Voltage, Any Terminal | | min -0.3 V | 5 |
| Storage Temperature Range | | min -65 · max 125 °C | 5 |
| Operating Temperature Range | | min -40 · max 85 °C | 5 |
| Maximum Junction Temperature | | max 140 °C | 5 |
| θJA Thermal Impedance θJA | Device in free air on a 4-layer JEDEC board | max 48 °C/W | 5 |
| θJC Thermal Impedance θJC | | max 4.4 °C/W | 5 |
| Human Body Model (HBM) | ESD Rating | max 8 kV | 5 |
| Charged Device Model (FICDM) | ESD Rating | max 1.25 kV | 5 |
| Machine Model (MM) | ESD Rating | max 200 V | 5 |