Ctvt pmod

CTVT PMOD

CTVT PMOD is a compact, open-hardware analog front end for phase-coherent current and voltage sampling. It uses a TI ADS131M02 dual 24-bit delta-sigma ADC and is intended for energy-monitoring DSP experiments, including Tiny Tapeout ASIC projects.

The routed KiCad 10 design is 30 mm x 70 mm with 3 mm corner radii and two 2.2 mm non-plated M2 mounting holes at the PMOD end. The PMOD connectors are centered together on one short edge; the CT and AC/AC transformer inputs face away from them at the opposite edge so adjacent PMODs remain usable. All routed signals use 0.25 mm traces with 0.20 mm copper clearance.

The narrow layout keeps the measurement front end beside other PMODs rather than blocking them. Both field connectors project beyond the board edge for comfortable cable access, while the vertical female header provides a second PMOD connection for stacking or logic-analyzer access.

Component side	Rear silkscreen and routing

Digital companion

The CTVT Energy DSP repository contains the companion Tiny Tapeout design. Its working first stage captures ADS131M02 frames, performs time-shared multiply-accumulate operations, generates the ADC clock and reset, and publishes coherent voltage, current, active-power, RMS, and energy measurements over a separate host SPI interface. The roadmap adds full ADC register configuration, gain/phase calibration, power-quality events, and resource-efficient Goertzel harmonic analysis.

See ADC PMOD comparative analysis for a comparison with the commercial ADC and mixed-signal boards listed in docs/expansion_boards__daughter_cards.csv, including the AD7124-8 precision delta-sigma PMOD.

Signal path

CT jack -> split burden -> protection -> differential RC filter --+
                                                                   |
AC/AC jack -> balanced divider -> protection -> differential RC ---+-> ADS131M02
                                                                        |
3.3 V PMOD <---------------- SPI, DRDY, RESET, CLK ----------------------+

• Current channel: Same Sky SJ-3523-SMT-TR 3.5 mm stereo jack, with tip and sleeve as the differential CT input and ring grounded. Two 6.49 ohm 0.1% burden resistors form a 12.98 ohm differential burden. The jack's mating face overhangs the field edge by 2.0 mm so a right-angle plug body clears the PCB.
• Voltage channel: Same Sky PJ-002BH-SMT-TR barrel jack for an isolated 9-12 VAC transformer. Each leg uses a 100 kohm / 6.49 kohm balanced divider.
• Filtering: Each ADC channel has two 1 kohm series resistors and a 10 nF C0G differential capacitor, giving an approximate 8 kHz differential pole.
• Assembly: All chip passives are 0603 or larger and every fitted reference designator is present on silkscreen.
• Protection: SMF3.3CA on the CT input and SMBJ18CA on the transformer input.
• Conversion: ADS131M02 with filtered analog power, local decoupling, seven test points, and simultaneous voltage/current sampling.

PMOD interface

J1 is the right-angle male peripheral connector. J4 is a vertical female Wurth 61301221821 vertical pass-through socket; all twelve pins are connected one-to-one for PMOD chaining.

The Tiny Tapeout companion maps the PMOD signals as follows:

This standard Pmod ordering lets the board plug directly into the bidirectional Tiny Tapeout/FabricFox connector. The host processor uses the separate input and output ports, so it does not contend with the ADC bus.

Scaling and calibration

The CT channel differential voltage is:

V_CT_RMS = I_secondary_RMS x 12.98 ohm

For example, a 100 A : 50 mA CT produces approximately 0.649 Vrms at rated primary current. Confirm the selected CT's maximum secondary current and fault behavior before connection.

The voltage channel nominal divider ratio is:

6.49 kohm / (100 kohm + 6.49 kohm) = 0.06095

A 9-12 Vrms isolated transformer therefore produces approximately 0.549-0.731 Vrms differential at the ADC input. Configure the ADS131M02 gain for the resulting peak voltage and retain headroom for transformer regulation and mains excursions.

Calibrate voltage gain, current gain, phase, and channel offset against a traceable low-voltage source before calculating power. TP1-TP4 expose the four ADC inputs; TP5 is DRDY, TP6 is +3V3, and TP7 is GND.

Safety

Use only an isolated CT and a certified isolated AC/AC transformer. Never connect mains directly to this board. The barrel jack is an isolated low-voltage AC input, not a DC supply input. Enclosure, wiring, fusing, creepage, clearance, and regulatory compliance remain the responsibility of the final system.

Build and outputs

Open ctvt-pmod.kicad_pro in KiCad 10. The committed schematic and PCB are complete and routed. Project-local connector footprints and STEP models avoid dependencies on the ATM90E26 FeatherWing repository.

The design sources are generated in this order:

python scripts\generate_schematic.py
& "C:\Program Files\KiCad\10.0\bin\python.exe" scripts\generate_board.py
# Export a Specctra DSN, route it, and save the result as routing\ctvt-pmod.ses.
& "C:\Program Files\KiCad\10.0\bin\python.exe" scripts\finalize_route.py

scripts/finalize_route.py imports the saved Freerouting session, normalizes all traces to at least 0.25 mm, verifies the stereo jack's generated 2.0 mm mating-face overhang, adds the rear OSHW/Whatnick branding, and fills GND zones on both copper layers. Run scripts\adjust_stereo_jack.py to verify the overhang independently or scripts\add_branding.py to reapply only the branding. Run scripts\add_mechanical_features.py to reapply the 3 mm corner radii and two M2 mounting holes without disturbing routed copper or manual silkscreen. Manufacturing exports are generated into ignored gerbers/ and bom/ directories. The reviewed orderable BOM and DigiKey sourcing notes are committed in docs/ctvt-pmod-sourced-bom.csv and docs/bom-sourcing.md.

Generate the Elecrow PCBA upload package with:

python scripts\export_elecrow.py

This creates manufacturing/elecrow/ctvt-pmod-elecrow-pcba.zip containing a Gerber ZIP, curated BOM, component position file, and current KiCad DRC/ERC reports. See docs/elecrow-manufacturing.md for package contents and assembly-review notes.

Repository contents

• ctvt-pmod.kicad_sch - complete schematic
• ctvt-pmod.kicad_pcb - routed two-layer PCB
• ctvt-pmod.pretty/ - project-local barrel-jack and PMOD socket footprints
• models/step/ - project-local connector STEP models
• routing/ctvt-pmod.ses - saved autorouter result
• scripts/ - deterministic schematic, placement, and routing finalization

Licensed under CERN-OHL-S-2.0-or-later.