Cadzilla is an open-source printed circuit board by ToddHoug, from the ToddHoug/cadzilla repository on GitHub. It is a 6-layer board of 253.6 × 134.2 mm with 172 parts on 483 nets, routed with 6,050 tracks and 1,311 vias.
It is built around the 74F245D, 74F676PC and 74LS573PC, with the 74LS04PC, 74LS273PC and 74LS85DC among its other parts. Its parts include 87 capacitors, 60 ICs, 11 diodes, 7 resistors and 3 connectors. It belongs with the FPGA and CPLD boards of this library.
CADzilla is an S-100 bus board built around the Hitachi HD63484 Advanced CRT
Controller (ACRTC) paired with a Brooktree Bt453 video DAC. The board
carries about 2.2 MBytes of video memory in total:
a 2 MByte frame buffer for 8-bit-per-pixel display modes at resolutions
up to 1024x768;
a 256 KByte, 1-bit-per-pixel overlay layer, mapped pixel for pixel onto
the frame buffer and shown on top of it in the Bt453's overlay color. It
can be drawn, shown and hidden without disturbing the picture underneath,
which suits text, cursors, grids and annotations.
Board design project: KiCAD schematics/PCB, GAL16V8 PLD logic, and supporting
software projects that run on it (assembled and tested on an emulator).
CADzilla exists for one reason: to enjoy the graphics board design process
the way I did it forty years ago. The circuit architecture, schematic
design, and PCB layout were all done by hand, with no AI assistance — the
way boards like this were designed back then.
Every component on the board, aside from the modern SRAM used for the
frame buffer, is a part that would have been available in 1984, when the
Hitachi HD63484 was released and the S-100 bus was still a going concern.
As far as I could find, no one had ever built an HD63484-based S-100
board — so I built one.
AI did play a role, but not in the hardware: it made it possible to build
a CP/M software development environment and toolchain for the board that I
could never have put together on my own.
Layout
schematics/ — KiCAD project (schematic, PCB, libraries, fab outputs)
docs/images/ — logo and other documentation images
tools/ — build/assemble/program scripts
tests/ — emulator test programs and expected output
Getting started with the software
The software runs under CP/M 2.2 on altairsim, an Altair/S-100 simulator
with a CADzilla board. Requirements:
altairsim, built at ~/altairsim/build/altairsim, on PATH, or named
by $ALTAIRSIM.
To see the graphics, altairsim must be built with SDL3, with an X11
or Wayland backend.
Without SDL3 it builds headless: everything here still builds and runs,
but no video window ever opens.
altairsim -n -x 'SHOW VERSION' says which build you have. Its video
row should read SDL3 -- windowed (...), not
none -- headless (null display).
To fix it, build SDL3 with altairsim's own script and link it in
statically. The headers are listed in altairsim's
docs/building-linux.md; libxtst-dev is required, and without the
X11/Wayland ones SDL3 gets no window backend:
bash
The configure step should report
SDL3 found -- video boards enabled (windowed);
a desktop session, for the window: it can't open over plain ssh;
bash 4.4 or later, python3 and GNU coreutils;
z88dk, for the z88dk and zcc projects only:
sudo snap install z88dk --edge. The snap only sees paths under $HOME,
so the clone has to be there too.
After cloning, run:
bash
tools/setup.sh
It checks the requirements, then builds every project. Each project gets
its own altairsim machine and CP/M disks in work/, and its program on that
disk. Nothing is installed. Without z88dk, the projects that need it are
skipped. tools/setup.sh --check runs only the check.
To run a program, start altairsim from the project's work/:
bash
cd software/asm/hello/work
altairsim cadzilla.toml
A0>HELLO
Ctrl-E stops the machine and gives you the altairsim> monitor, RUN
carries on, and QUIT leaves.
Wait a moment at A0> before stopping: the BIOS writes its last disk
track to the image only then.
Each project has its own build.sh, which rebuilds it onto its disk, e.g.
software/m80/gfxdemo/build.sh.
--clean resets the project's disks from the pristine images first.
A failed build exits non-zero, shows the error lines, and leaves the full
CP/M transcript in build/<NAME>.LOG.
tools/altairsim/README.md has the details, and how an AI assistant drives
the same machines.
Board specification
I/O address map
The board decodes a single 8-byte-aligned base I/O address, set by SW1
(see below). All board registers are addressed as offsets from that base
address:
Overlay enable: 0 = overlay plane blanked (shift register loads zeros), 1 = overlay pixels displayed over the frame buffer
4
OLSEL
Overlay select: 0 = lower half, 1 = upper half of the overlay memory — selects which 64K-word half of the 128K-word overlay SRAM a drawing-mode CHR screen addresses
5–7
—
Reserved
The overlay (U19, 1 bit per pixel, mapped 1:1 onto frame-buffer pixels) is
drawn by targeting an ACRTC screen with the CHR bit set in its Memory Width
register. A CHR screen only has a 64K-word address space, so OLSEL selects
which 64K-word half of the 128K-word overlay SRAM that screen addresses.
OLSEL is cleared to 0 by reset. A CHR screen must never be displayed —
overlay display is driven by the frame buffer's own display cycles,
independent of OLSEL.
Configuration DIP switch (SW1)
SW1 is an 8-position DIP switch that sets the board's I/O base address and
host interface options:
Switch
Function
On
Off
SW1-1 – SW1-5
I/O base address (address bits 7:3)
—
—
SW1-6
HD63484 host bus width
8-bit host interface: DACK* follows RESET*, so it is low during reset
16-bit host interface: DACK* is pulled high
SW1-7
16-bit address decode enable
Decodes the full 16-bit I/O address (A15–A8 must be 00h)
Decodes only the 8-bit I/O address
SW1-8
Interrupt enable
HD63484 interrupt request connected to the S-100 bus
Interrupt request disconnected from the S-100 bus
Frame buffer and feature support
About 2.2 MBytes of video SRAM in total — no refresh cycles required
256 KByte 1-bit-per-pixel overlay (U19, 128K x 16):
mapped 1:1 onto frame-buffer pixels, and read during the frame buffer's
own display cycles;
shown over the picture in the Bt453's programmable overlay color, and
turned on or off with MODE register bit OLEN;
drawn through an ACRTC screen with CHR set, which is never displayed.
MODE register bit OLSEL selects which half of the overlay it addresses
The ACRTC's own hardware cursor, superimposed access mode, light pen,
zooming, video attributes, external sync, and DMA transfers are not
supported. A cursor can be drawn in the overlay instead
Hardware (the KiCAD schematics and PCB layout in schematics/, the
GAL logic in pld/, and the board manual) is licensed under the
CERN Open Hardware Licence Version 2 - Permissive
(CERN-OHL-P-2.0).
Software (everything in software/, tools/ and tests/) is
licensed under the GNU General Public License,
version 3 or (at your option) any later version (GPL-3.0-or-later).
The manufacturers' datasheets in docs/datasheets/, and the
third-party CP/M tools on the disk images, are not covered by either
license. See LICENSE for the full breakdown.
It measures 253.6 × 134.2 mm and has 6 copper layers, 1.6 mm thick.
What parts does the Cadzilla use?
172 parts, built around the 74F245D, 74F676PC, 74LS573PC and 74LS04PC. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.
Where can I download the Cadzilla KiCad files?
From the ToddHoug/cadzilla repository on GitHub, at the commit this page was made from: the board is schematics/cadzilla.kicad_pcb and its schematic schematics/Data BUffers.kicad_sch. PCBKit opens the board in the browser, with nothing to install.
Can I use the Cadzilla design in my own project?
Its repository states no licence, so its author keeps all rights: ask ToddHoug before reusing the design.
ToddHoug/cadzilla
