
Memory subsystem
TSJR/logic-analyzer
TTL logic analyzer built from 74xx logic and LED dot matrix display

Z80 interposer board providing extended memory and I/O instruction mapping
Nabu MEGAMAPPER is an open-source printed circuit board by tergav17, from the tergav17/Z80-MegaMapper repository on GitHub. It is a 2-layer board of 158.8 × 91.4 mm with 42 parts on 107 nets, routed with 3,149 tracks and 108 vias.
It is built around the 74LS245SC, AS6C4008-55PCN and 74LS157PC, with the 74LS374PC, 74LS670 and 74LS139PC among its other parts. Its parts include 20 capacitors, 19 ICs and 3 connectors. It belongs with the retro computing and games boards and the FPGA and CPLD boards of this library.

The Z80 MegaMapper (ZMM) is designed to enhance the ability of existing retro computers. This is done by interposing the Z80 CPU and intercepting certain signals. The current version of the MegaMapper provides the following enhancements:
The expanded memory is fairly self explanatory, but the other features may require a bit of explanation. The goal of the MegaMapper is to allow a Z80 machine to support “virtual machines”. These machines, with the help of a software hypervisor, can be made to seamlessly run software from other computer architectures. A single machine can act as an MSX, Colecovision, SG-1000, ZX81, Heathkit H8, TRS-80 Model II, TI-83, etc… simply by changing what hypervisor software is running. Additionally, virtual machines can be debugged in real time, to the point of being single-steppable.
This is different from emulation as fundamentally everything is still executing on bare hardware. It provides vast software compatibility while still scratching the “retro hardware” itch that makes emulators simply not as fun (personally). In theory, this same type of device could have been built in the 80s with off-the-shelf components. All of the heavy lifting is still done by the ~3.5 Mhz Z80 processor.
Admittedly, emulation can always provide better results than a janky virtualization set up like this. This is more of a “Because I Can” project than anything else.
The important parts of this seem to work. The PSG -> AY translation is passable, but it still needs some work in terms of tone and support for the noise channel. Pausing is also buggy due to lack of functional NMI.
Boots to MSX basic just fine. Can also run all of the 32K cartridge ROMs I threw at it. Keyboard matrix still needs to be updated to support all keys.
The Z80 data bus buffer currently doesn't work properly due to IM2-related shenanigans. The system works fine without it, so it may be omitted in a future revision.
At the moment, there is no way to maintain IFF2 contents during a trap. This is fine for systems that don't need an NMI, but can cause interrupt issues to those that do. It should be possible to add a status bit that keeps trick of if IFF1 and IFF2 are supposed to be equal, and work backwards from there.
The classic NMOS CPUs seem to have issues sometimes with detecting clock edges on the M1 cycle. Currently, this is circumvented by just getting a faster CMOS Z80.
The ZMM is designed to slot directly into where the Z80 plugs into the mainboard of the host computer. Everything runs on +5V, so no additional jumpers are needed.

One of the major design limitations of the ZMM is the fact that no provisions have been made for memory mapped I/O. Video RAM can crudely be accomplished by periodically scanning parts of memory and updating the VDP accordingly. This is very inefficient, especially the bigger the VRAM section gets. The size of the bankable sections is also limited to 16 KB, anything smaller will have to be emulated by manually copying sections of memory.
| Quantity | Reference | Part | Link |
|---|---|---|---|
| 1 | U2 | 74LS32 | |
| 2 | U3, U4 | 74LS670 | |
| 1 | U5 | HM6116 | |
| 3 | U6..8 | 74LS157 | |
| 1 | U9 | 74LS244 | |
| 2 | U10, U11 | 74LS374 | |
| 1 | U12 | 74LS85 | |
| 1 | U13 | XC9536PC44 | |
| 1 | U14 | 74LS139 | |
| 1-4 | U15..18 | AS6C4008 | |
| 0 | U19 | 74LS245 | |
| 19 | C1..19 | 0.1 uF C | |
| 1 | C20 | 100 uF |
| Qty | Value | Footprint | References |
|---|---|---|---|
| 19 | 0.1 uF | Capacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm | C1, C2, C3, C4, C5, C6, C10, C11, C12, C13, C14, C15, C16, C17, C18, C19 +3 |
| 4 | AS6C4008-55PCN | Package_DIP:DIP-32_W15.24mm | U15, U16, U17, U18 |
| 3 | 74LS157 | Package_DIP:DIP-16_W7.62mm | U6, U7, U8 |
| 2 | 74LS374 | Package_DIP:DIP-20_W7.62mm | U10, U11 |
| 2 | 74LS670 | Package_DIP:DIP-16_W7.62mm | U3, U4 |
| 2 | Z80 Socket Header | Connector_PinHeader_2.54mm:PinHeader_1x20_P2.54mm_Vertical | J1, J2 |
| 1 | 100 uF | Capacitor_THT:CP_Radial_D6.3mm_P2.50mm | C20 |
| 1 | 74LS139 | Package_DIP:DIP-16_W7.62mm | U14 |
| 1 | 74LS244 | Package_DIP:DIP-20_W7.62mm | U9 |
| 1 | 74LS245 | Package_DIP:DIP-20_W7.62mm | U19 |
| 1 | 74LS32 | Package_DIP:DIP-14_W7.62mm | U2 |
| 1 | 74LS85 | Package_DIP:DIP-16_W7.62mm | U12 |
| 1 | HM6116 | Package_DIP:DIP-24_W15.24mm | U5 |
| 1 | JTAG | Connector_PinHeader_2.54mm:PinHeader_1x06_P2.54mm_Vertical | J3 |
| 1 | XC9536PC44 | Package_LCC:PLCC-44_THT-Socket | U13 |
| 1 | Z80CPU | Package_DIP:DIP-40_W15.24mm | U1 |

TSJR/logic-analyzer
TTL logic analyzer built from 74xx logic and LED dot matrix display

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It measures 158.8 × 91.4 mm and has 2 copper layers, 1.6 mm thick.
42 parts, built around the 74LS245SC, AS6C4008-55PCN, 74LS157PC and 74LS374PC. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.
From the tergav17/Z80-MegaMapper repository on GitHub, at the commit this page was made from: the board is KiCAD/Nabu_MEGAMAPPER/Nabu_MEGAMAPPER.kicad_pcb and its schematic KiCAD/Nabu_MEGAMAPPER/Nabu_MEGAMAPPER.kicad_sch. PCBKit opens the board in the browser, with nothing to install.
Its repository states no licence, so its author keeps all rights: ask tergav17 before reusing the design.