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2 layers252 × 102.5 mmVectorSplitK, the printed circuit board in 3D

A wireless high-profile 42 key mechanical split keyboard based on Seeed Studio XIAO nRF52840.

Size
252 × 102.5 mm
Copper layers
2
Thickness
1.6 mm
Parts
105
Nets
84
Pads
460
Tracks, vias
497, 81
Routed
Yes
KiCad
KiCad 9.0 (file 20241229)
Created
30 Jun 2026
Updated
22 Jul 2026

Overview

VectorSplitK is an open-source printed circuit board by SunritHazra, from the SunritHazra/VectorSplitK repository on GitHub, published under the MIT licence. It is a 2-layer board of 252 × 102.5 mm with 105 parts on 84 nets, routed with 497 tracks and 81 vias.

Its parts include 42 diodes, 42 switches, 4 resistors and 2 ICs. It belongs with the keyboards and input boards and the nRF52 and nRF5x boards of this library.

README

README.md

VectorSplitK

An open-source, wireless, high-profile 42-key mechanical split keyboard. Built around the powerful Seeed Studio XIAO nRF52840, the VectorSplitK features an aggressive columnar stagger, custom-modeled flat profile keycaps, and a robust dual-case mechanical assembly. This project is my first split keyboard. The PCB was made entirely in KiCad and the CAD was done in Autodesk Fusion.

Full day-by-day design log, decisions, and dead ends: JOURNAL.md

Project stats: 14 build-log days · ~40h 20m total design time · 100% designing progress, 0% building progress (as of the latest journal entry)

On the name: Follows the author's personal naming convention for electronics projects (used previously for hackpad and devboard) — a descriptive word, a short form of the project's defining trait ("Split"), and a single trailing letter — giving VectorSplitK.


Renders

Standard Top View

Render 1

Isometric Split Profile

Render 2

Rear Profile (USB-C & Alignment)

Render 3

Hardware Architecture

1. Electrical Schematic

The electrical system uses hierarchical sheets in KiCad to define identical left and right sides. It resolves typical multi-sheet duplicate ground issues by utilizing sheet-specific power flags (${SHEETNAME}_GND).

Main Sheet

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Left Half Matrix

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Right Half Matrix

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2. Footprints

  • Switch Footprints: High-profile acheron_MXH:MX100H (1.00u) and acheron_MXH:MX150H (1.50u) hotswap-ready switches (42 total, 21 per side).
  • Diodes: Diode_SMD:D_SOD-123 (42 total, 1 per key).
  • Mounting Holes: MountingHole:MountingHole_3.2mm_M3_DIN965_Pad (8 total, 4 per side).
  • Resistors: Resistor_SMD:R_0805_2012Metric (4 total, 2 per side).
  • Integrated Circuit: modified-XIAO-nRF52840-SMD:modified-XIAO-nRF52840-SMD (2 total, 1 per side).
  • Testing Points: TestPoint:TestPoint_Pad_D2.0mm (4 total, 2 per side).
  • Mousebites: Clean PCB snapping using PCM_marbastlib-various:mousebites_5p5mm_easysnap (3 break-offs).

3. Printed Circuit Board Assembly

Designed for rugged reliability and high-profile ergonomics using the custom footprints above.

KiCad PCB Window

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KiCad PCB Render

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KiCad PCBA Render

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KiCad PCB Back Side

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KiCad PCBA Back Side

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4. Enclosure & CAD Assembly

Designed from scratch in Autodesk Fusion, featuring integrated battery slots, precise USB-C ports, and secure brass threaded insert sockets.

file structure of fusion

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top case and bottom case together in fusion

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section analysis in fusion showing the screw assembly

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  • Tolerance Offset: 0.2 mm case-on-case fit alignment.
  • Plates: Structural upper case acts as a switch plate, anchoring switches securely.
  • Keycaps: Custom-modeled 1.00u and 1.50u flat profile MX-stem keycaps tailored for 3D printing.
  • CAD files: /CAD

Libraries & References

KiCad libraries used:

Layout & edge-cut inspiration (referenced for switch arrangement and board outline conventions):

Keycap reference model: Flat MX Keycaps — Printables, used as a base to project and re-model custom 1.00u/1.50u profiles.


Design Notes

Columnar stagger layout: Switches placed on a 20 mm grid; second and fourth rows shifted 10 mm up, the middle row shifted 20 mm up, with board edges drawn 5 mm out from the outermost keys.

Hierarchical sheet grounding: KiCad hierarchical sheets duplicate net names by default, which merged the left/right ground nets into one. Fixed using sheet-specific power flags (${SHEETNAME}_GND), producing distinct Left_GND and Right_GND nets per half.

Case construction (Fusion 360): Built symmetrically — one side of the PCB modeled, then mirrored — with:

  • Screw hubs extruded directly from the PCB's mounting hole positions
  • A battery cavity sized to the WLY394058 LiPo and centered relative to the four mounting screws
  • A USB-C cutout on the lower case wall, offset slightly oversized for clearance

Keycap modeling: 1.00u caps built by lofting projected upper/lower faces of a reference keycap, then hollowing and adding a stem + cross-hub. 1.50u caps were derived by splitting the 1.00u shape, spacing the halves 9 mm apart, and bridging the gap. Stem geometry was verified by cutting the actual switch stem shape directly into the keycap model to guarantee fit.

Upper case (switch plate): Modeled by projecting all switch bodies into a sketch, offsetting 1 mm around each switch and 1.5 mm along the walls, then extruding to the wall thickness (4.05 mm) with screw-hole pillars extended up from the PCB. Outer walls were thinned via a −0.8 mm facial offset on the curved edges for a lighter profile. Corner/cutout dimensions (14.70 × 14.70 mm switch openings, 0.705 mm corner radius) were carried over from the author's earlier hackpad build.

Design refinements: The SoC position, PCB mounting holes, and upper-case mounting holes were all iterated to (1) clear the USB-C cable path symmetrically on both halves, (2) keep mounting holes equidistant from the three nearest switches for insert clearance, and (3) keep the upper-case screw geometry in sync with the final PCB layout.


Fabrication & Testing

  • Electrical Rule Check (ERC) run after schematic completion to catch connection errors before layout.
  • Design Rule Check (DRC) run after routing, with remaining clearance/edge errors resolved before export.
  • Silkscreen: Front Fab and Back Fab converted to Back Silkscreen; User.Drawings converted to Front Silkscreen and User.Eco1 to Back Silkscreen; testing points manually labeled and text centered relative to switches. Author name, project name, and build month/year added to the front silkscreen for the final revision.
  • Gerber export: Full fabrication output exported as VectorSplitK_Gerber.zip.
  • Fab test: Gerbers test-uploaded to JLCPCB to validate manufacturability ahead of ordering.
  • STEP export: PCB exported at multiple levels of detail (full detail for reference, minimal/simplified for clean CAD import) to support Fusion 360 case modeling.

Bill of Materials (BOM)

Full sourcing sheet with vendors and pricing: /Bill of Materials

Electronics & PCBs

  • 2x PCBs (Left & Right snap-apart panels)
  • 2x Seeed Studio XIAO nRF52840 MCU boards
  • 2x WLY394058 3.7V 1000mAh 1S LiPo Batteries (3.9 mm thickness for slim fit)
  • 42x Mechanical switches (MX compatible)
  • 42x Kailh MX Hotswap Sockets
  • 42x SOD-123 SMD Diodes (1N4148)
  • 4x 0805 Metric SMD Resistors (2 per side)

Hardware & Case Assembly

  • M3 Screws (Specific lengths to clamp top and bottom cases)
  • M3 Brass Knurled Heat-Staking Inserts (Pressed into bottom case pillars)
  • 1x Set Custom-printed 1.00u & 1.50u flat keycaps (STEP files included)

Sourcing

ComponentVendor
PCB FabricationJLCPCB
Switches & Kailh Hotswap SocketsMeckeys
Diodes, Resistors, SoC, BatteryRobu.in
Screws & Knurled InsertsOnlyScrews

Firmware

The board runs wireless ZMK firmware on the XIAO nRF52840, using a custom shield built on the upstream seeeduino_xiao_ble board support.

Matrix

5 columns × 5 rows per half (21 keys/side, 42 total — a 4×5 grid plus 1 thumb key), with diode-direction = "col2row" matching the SOD-123 diode orientation on the PCB.

SignalXIAO Pin
COL_0P0.03
COL_1P0.28
COL_2P0.29
COL_3P0.04
COL_4P0.05
ROW_0P1.15
ROW_1P1.14
ROW_2P1.13
ROW_3P1.12
ROW_4P1.11

Config

Firmware lives in /zmk-config, structured as its own ZMK user-config repo: zmk-config/ ├── build.yaml ├── config/ │ ├── vectorsplitk.keymap │ ├── vectorsplitk.conf │ └── west.yml ├── boards/shields/vectorsplitk/ │ ├── vectorsplitk.dtsi │ ├── vectorsplitk_left.overlay │ ├── vectorsplitk_right.overlay │ ├── vectorsplitk.zmk.yml │ ├── Kconfig.shield │ └── Kconfig.defconfig └── .github/workflows/build.yml

Pushing this folder as its own GitHub repo triggers a GitHub Actions build via build.yaml, producing vectorsplitk_left-seeeduino_xiao_ble-zmk.uf2 and vectorsplitk_right-seeeduino_xiao_ble-zmk.uf2 under the Actions tab, no local toolchain required.

Known caveat: the matrix transform assumes COL_0 is the innermost column (closest to the thumb key) on both halves. If keys type in mirrored left-right order on first flash, reverse the column order in vectorsplitk.dtsi — a firmware-only fix, no rewiring needed.

Flashing

  1. Double-tap Reset on the XIAO nRF52840 to mount it as a USB drive.
  2. Drag the matching .uf2 (left or right) onto the drive.

AI as a Design Collaborator

While the hardware engineering, PCB routing, firmware architecture, and 3D CAD modeling were completed manually, AI (Gemini, ChatGPT, and Claude) was used as a technical assistant throughout the project—not to generate designs, but to help research, troubleshoot, validate decisions, and improve documentation.

  • Brainstorming: Helped refine the project name (VectorSplitK).
  • Research & Validation: Verified switch footprints, component choices, and battery selection.
  • Debugging: Assisted in resolving KiCad schematic and hierarchical-sheet issues.
  • Design Review: Discussed engineering trade-offs, BOM costs, and manufacturing decisions.
  • Firmware & Documentation: Helped architect the initial ZMK firmware configuration, reviewed the PCB matrix for firmware setup, and improved the project's technical documentation.

Project Integrity: All schematics, PCB layouts, routing, CAD models, and mechanical design were created manually in KiCad and Autodesk Fusion. AI was used only for research, troubleshooting, review, firmware guidance, and documentation.


License

This project is licensed under the MIT License - see the LICENSE file for details.


Parts

105
QtyValueFootprintReferences
42DDiode_SMD:D_SOD-123D1, D2, D10, D11, D12, D13, D14, D15, D16, D17, D18, D19, D20, D21, D22, D23 +26
40SW_Pushacheron_MXH.pretty-master:MX100HSW1, SW2, SW10, SW11, SW12, SW13, SW14, SW15, SW16, SW17, SW18, SW19, SW20, SW21, SW22, SW23 +24
8MountingHoleMountingHole:MountingHole_3.2mm_M3_DIN965_PadH1, H2, H3, H4, H5, H6, H7, H8
3break offPanelization.pretty-master:mouse-bite-2mm-slotBO1, BO2, BO3
22 MΩResistor_SMD:R_0805_2012MetricR3, R4
2806 KΩResistor_SMD:R_0805_2012MetricR1, R2
2BATTestPoint:TestPoint_Pad_D2.0mmTP1, TP2
2GNDTestPoint:TestPoint_Pad_D2.0mmTP3, TP4
2SW_Pushacheron_MXH.pretty-master:MX150HSW41, SW42
2XIAO-nRF52840-SMDmodified-XIAO-nRF52840-SMD:modified-XIAO-nRF52840-SMDU1, U2

Questions

How big is the VectorSplitK PCB?

It measures 252 × 102.5 mm and has 2 copper layers, 1.6 mm thick.

What parts does the VectorSplitK use?

105 parts. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.

Where can I download the VectorSplitK KiCad files?

From the SunritHazra/VectorSplitK repository on GitHub, at the commit this page was made from: the board is PCBA/VectorSplitK.kicad_pcb and its schematic PCBA/VectorSplitK.kicad_sch. PCBKit opens the board in the browser, with nothing to install.

Can I use the VectorSplitK design in my own project?

Its repository publishes it under the MIT licence: you may reuse it on that licence's terms (keep the author's notice, and for a copyleft licence share your changes alike).

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