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4 layers150 × 130 mmEEG CAR-01 RevB routed, the printed circuit board in 3D

EEG CAR-01 RevB routed

stepvda/EEG-kit

The complete manufacturing package for EEG-CAR-01 Rev B: a battery-powered, 16-channel EEG headset built around an ESP32-S3 carrier board, together with the helmet and enclosure, the electrode harness, the firmware, the…

Size
150 × 130 mm
Copper layers
4
Thickness
1.6 mm
Parts
211
Nets
156
Pads
636
Tracks, vias
3,745, 552
Pours
8
Routed
Yes
KiCad
KiCad 5 (file 20171130)
Created
3 Sep 2026
Updated
10 Sep 2026

Overview

EEG CAR-01 RevB routed is an open-source printed circuit board by stepvda, from the stepvda/EEG-kit repository on GitHub. It is a 4-layer board of 150 × 130 mm with 211 parts on 156 nets, routed with 3,745 tracks and 552 vias.

It is built around the TLV3201AIDBV, BAV99 and BAT54S, with the PESD5V0S2BT among its other parts. Its parts include 72 resistors, 54 capacitors, 30 connectors, 21 diodes and 4 ICs. It belongs with the ESP32 boards of this library.

Main components

4

README

README.md

EEG Field Kit — Design & Production Package v2.4

TI One Voice research programme — one.witysk.org, Brussels, Belgium Board revision B · 2 September 2026

The complete manufacturing package for EEG-CAR-01 Rev B: a battery-powered, 16-channel EEG headset built around an ESP32-S3 carrier board, together with the helmet and enclosure, the electrode harness, the firmware, the production test programme and fixtures, and all the packing, quality and regulatory documentation needed to produce the finished kit — flight case included.

The package is designed so that a manufacturer can quote, review and build from it directly: the Gerbers, drill files, netlist, BOM and CPL files are included, along with every printed part, the assembly work instructions and an end-to-end test programme that runs from Chrome over USB. For the study itself — participants, collaborators, grant bodies and funders — see one.witysk.org/studies.


Status at a glance

Nothing in this package has been manufactured or measured. No board has been fabricated, no part has been printed, no firmware has been flashed to silicon, and no electrode has touched a person. Every performance figure is calculated, and each is labelled as calculated where it appears.

AreaState
Carrier board routingComplete. 145 of 145 nets connected, 0 DRC violations. Released for review under RFQ-EEG-002A — not yet released for fabrication: no human layout engineer has reviewed it, and 169 connections close at relaxed width or gap.
FirmwareBuilt and boots under QEMU (ESP-IDF v5.2.5, esp32s3). Never run on real hardware — no hardware exists.
Mechanical parts29 STL + 28 STEP released. Nothing has been printed. Foam case insert not released for cutting until the helmet shell is measured.
Test programmeWritten and self-tested (57/57 interop checks). Never run against a physical unit.
Production simulation193 checks passed, 0 failed, 6 open items.
SafetyNot done. The safety review gates Phase 2; nothing goes on a head before it.

Read KNOWN_ISSUES.txt before quoting or building anything. It is the short list, in one place, of what is wrong with the data as shipped — 6 open items and 22 unapproved assumptions in 15 sections. Everything in it is also in the controlled documents; the file exists so that problems are found here rather than at CAM time.


Orientation — read in this order

  1. README_package_index.txt + KNOWN_ISSUES.txt — the orientation pair. The index says what every folder is for and gives the rebuild commands (its header is stale at v2.2; this package is v2.4).
  2. docs/RFQ-EEG-001 Rev E — the actual request: numbered requirements (E-, S-, F-, T-), the pricing template, and §9.4's correction-iteration terms for prototypes that arrive not working.
  3. docs/DSN-EEG-003 Rev D — the governing document. Architecture, the carrier board, and the precedence rules that decide which document wins when two disagree.

Precedence: DSN-EEG-003 Rev D > RFQ-EEG-001 Rev E > ICD-EEG-006 > SCH-EEG-005 > DSN-EEG-002 > PARTS-EEG-019 > RUL-EEG-021 > the bidder BOM. Where a number appears in a document and in tools/design.py, design.py governs — tools/emit_all.py regenerates every fabrication file from it in one pass, so the package cannot drift.


Repository layout

PathContents
docs/21 controlled documents (Rev-controlled, in .md, .docx and .pdf): the RFQ, the manufacturing design package, interface control, schematic set, assembly work instructions, harness wire list, test specification, fixture design, quality plan, risk & safety pack, regulatory file (incl. lithium shipping UN3481/PI967), service & refurbishment, participant card, packing & labelling, change control, approved vendor list, production simulation, part register, firmware build & provisioning, rulings register — plus the three workbooks: bidder BOM, internal costed BOM, manufacturer contacts.
kicad/EEG-CAR-01 Rev B fabrication pack: routed .kicad_pcb, DRC report, BOM, two CPL files, fabrication/assembly/copper drawings, PCB spec sheet, machine-readable net report — and gerber/: 11 Gerber X2 layers, two Excellon drills, IPC-D-356A netlist, zipped, with a SHA-256 for every file.
kicad/wh-bus-01/The second, tiny PCB: 14 × 10 × 0.8 mm bus board that splits the harness LED_V into eight contact-light tails. The helmet doesn't work without it.
schematic/SCH-EEG-005 Rev B, an 8-sheet A3 schematic set (PDF + PNGs), generated from tools/design.py. Drawings only — there is no editable .kicad_sch.
mech/Every printed and cut part: stl/ (29 printable meshes), step/ (28 parametric solids for dimensioning and inspection), drawings/ (25 dimensioned sheets), renders/ (25 shaded views), 7 foam-layer DXFs for the flight case, the hardware schedule and the mechanical release status.
firmware/The ESP-IDF project (main.c, drivers, provisioning opcodes) and release/: four flashable ESP32-S3 images (bootloader, partition table, OTA data, app) with a SHA-256 manifest and the exact esptool command — no toolchain needed to program a board. firmware/tools/ is the end-of-line provisioning station: ATECC608B keying, serial & calibration writes, signed-stream verification.
webtest/TOOL-EEG-022, the connectivity test: one self-contained 52 kB HTML file an assembler double-clicks in Chrome to prove browser–computer–USB–device connectivity (no measurement, no server, nothing to install). The interop harness compiles the real main.c against ESP-IDF stubs and drives it with the real host protocol module — 57/57 checks green.
fixtures/The four production test fixtures of JIG-EEG-009 as buildable data: PCB outlines and netlists (deliberately no copper), printed-part geometry, and RP2040 controller firmware speaking the FIXPROTO v1 line protocol. Nothing here has been built.
records/The machine-readable per-unit test record of TST-EEG-004 §12: a JSON Schema, a stdlib-only validator, and a worked example (all-DEFERRED). No unit has been built, so the schema has never met real output.
graphics/Board plots (four copper layers, fabrication drawing, drill map, assembly views, 3D renders) and labels/: the packing and marking artwork of PKG-EEG-015 — unit label, kit ID plate, 9 foam bay tags, carton set, lithium mark, tamper seal, disinfection card (22 SVG + 11 PDF).
tools/The generator: 42 Python modules, 19,072 lines, 27 entry points. design.py is the single source of truth for the board; mech_gen.py for the printed parts. Five re-runnable verification gates check connectivity, DRC, placement, cross-document consistency and the 15-station production dry run. Every figure in this package can be regenerated from source.
project/Why the kit exists: the 3-page partner proposal, the 161-page experiment design v4.2, and the 11-page project plan with its schedule and workstreams (supplier costs are placeholders).
reports/Working DRC reports, metrics and the placement checklist from the routing campaign.
constraints/Net rules used by the router.

The board

EEG-CAR-01 Rev B — 150.0 × 130.0 mm, four layers (L1 signal, L2/L3 reference planes split AGND_REF/DGND, L4 signal), 30 connectors, 211 reference designators, 156 nets.

  • 3,745 track segments, 552 through vias, 0 duplicates
  • 145 of 145 nets one connected copper island; 0 DRC violations
  • Smallest clearance 0.260 mm, narrowest conductor 0.200 mm, smallest plated hole 0.300 mm
  • No digital net in the analogue zone; exactly one AGND_REF-to-DGND bridge and one HARN_SHIELD-to-DGND bridge

The layout was produced by the programme's own constraint-aware autorouter and verified by measurement on the finished polygons — but it has not been reviewed by a human layout engineer. The DRC report lists every one of the 169 relaxed connections so a reviewer can go straight to the places that need attention.

Firmware

ESP-IDF v5.2.5, target esp32s3, Phase 1 configuration (secure boot off). Four release images with SHA-256 checksums, a 920-line main.c with 16 host commands and 13 provisioning opcodes, drivers for the ES8388 codec, SDMMC, ATECC608B, MAX17048 gauge and the envelope onset detector.

What has happenedWhat it provesWhat it does not
It builds, clean at -Wall -Werror=allThe image links and fitsThat any of it is right
It boots under QEMU (esp32s3)Bootloader, partition table and app_main() behave as writtenAny peripheral — QEMU has no PSRAM, SD, ES8388 or ADS1299
It agrees with the browser tool (57/57)Framing, CRC, opcodes, the S-01 interlockAnything about ESP-IDF or hardware

It has never run on silicon, and no hardware exists. The SPI timing, every ADS1299 register value, USB enumeration and the whole analogue front end are assumptions no silicon has answered. F-08 (block signing) is unimplemented; the ATECC608B config template is only 4 of 128 bytes reviewed — that write is irreversible, so it gates on a real part.

Testing & quality

  • TST-EEG-004 Rev C — the per-unit test: 32 steps T00–T30, with a 5,033-line JSON Schema and a stdlib-only validator so any two vendors emit the same record file.
  • JIG-EEG-009 Rev C + fixtures/ — four test fixtures as buildable data, with RP2040 controller firmware passing 154 host checks.
  • TOOL-EEG-022 — the browser connectivity test (webtest/EEG-Connectivity-Test.html) and the interop harness that keeps firmware and protocol from drifting apart.
  • SIM-EEG-018 — a production simulation that walks one unit through all fifteen stations, purchase order to refurbishment: 193 passed, 0 failed, 6 open.
  • ECO-EEG-016 — the change register that owns the document namespace and explains why everything is the way it is.

Rebuilding the package from source

sh
python3 tools/run_build.py          # route, pour, check            (~20 min)
python3 tools/emit_all.py --cached  # Gerbers, drawings, schematic
python3 tools/emit_extras.py        # spec sheet, netreport, STEP, manifest
python3 tools/mech_gen.py           # STL and STEP for every printed part
python3 tools/mech_drawings.py      # dimensioned drawings and renders
python3 tools/emit_workbooks.py     # the three spreadsheets
python3 tools/simulate_production.py --report docs/SIM-EEG-018_....md
python3 tools/make_docs.py          # A4 .docx and .pdf of every document

python3 tools/check_consistency.py  # cross-document consistency gate
python3 webtest/build.py            # rebuild the single-file connectivity tester
node webtest/tests/*.mjs            # protocol tests
sh webtest/tests/interop/run.sh     # firmware-vs-protocol interop (57 checks)

Production phases

  1. Phase 1 — 2 prototypes
  2. Phase 2 — 10 kits
  3. Phase 3 — 10 to 40 further kits (25 to 50 total)

Sponsorship

This study is run by a non-profit and funded by donations and grants that have not yet all been secured. Any part of the work treated as sponsorship — a discounted prototype build, parts at cost, donated units — is welcome, in return for named credit in the published open-hardware design files, acknowledgement in the resulting papers and on the platform, and the case study of an instrument you built being used in a pre-registered study.

Licence & contact

Hardware and documents: CC BY-SA 4.0 · Firmware: MIT

Third-party datasheets are excluded from both grants. Manufacturer datasheets and other third-party documents referenced by this package remain the property of their respective manufacturers, are referenced or redistributed for reference only, and are not covered by the CC BY-SA 4.0 licence above. See docs/datasheets/README_datasheets.md for the index and docs/datasheets/third_party/LICENCE_NOTE.md for the terms.

Stephane van der Aa — Founder, TI One Voice one.witysk.org · stephane@stepvda.com · +32 493 70 16 01

Parts

211
QtyValueFootprintReferences
1910n C0G 50VC_0603_1608MetricC1, C2, C3, C4, C5, C6, C10, C11, C12, C13, C14, C15, C16, C21, C41, C61 +3
18100n X7R 25VC_0603_1608MetricC23, C24, C43, C44, C50, C51, C52, C63, C64, C80, C81, C82, C83, C84, C85, C86 +2
17BAV99SOT-23D1, D2, D3, D4, D5, D6, D7, D8, D10, D11, D12, D13, D14, D15, D16, D23 +1
1668k 0.1% 25ppmR_0603_1608MetricR1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, R13, R14, R15, R16
1210k 0.1%R_0603_1608MetricR20, R21, R23, R24, R40, R41, R43, R44, R60, R61, R63, R64
1210u X5R 16VC_0603_1608MetricC20, C40, C60, C70, C71, C72, C73, C74, C89, C90, C100, C101
81k 1%R_0603_1608MetricR70, R71, R72, R73, R74, R75, R76, R77
70RR_0603_1608MetricR78, R79, R87, R90, R91, R92, R93
610k 1%R_0603_1608MetricR50, R51, R52, R81, R83, R88
6215k 0.1%R_0603_1608MetricR25, R26, R45, R46, R65, R66
4M3 x 3.2 mm NPTHMountingHole_3.2mm_M3MH1, MH2, MH3, MH4
322k 0.1%R_0603_1608MetricR27, R47, R67
322n C0G 50VC_0603_1608MetricC22, C42, C62
32k2 0.1%R_0603_1608MetricR28, R48, R68
34k99 0.1%R_0603_1608MetricR22, R42, R62
3BAT54SSOT-23D20, D40, D60
3OPA4376AIDSOIC-14_3.9x8.7mm_P1.27mmU1, U2, U3
3global fiducialFiducial_1mm_Mask3mmFID1, FID2, FID3
2100k 1%R_0603_1608MetricR84, R86
2100n X7R 50VC_0603_1608MetricC102, C103
24k7 1%R_0603_1608MetricR94, R95
1150k 1%R_0603_1608MetricR85
118650 protected cellJST_PH_B2B-PH-K_1x02_P2.00mm_VerticalJ13
11M 1%R_0603_1608MetricR82
12k2 1% -- DNPR_0603_1608MetricR89
1470k 1%R_0603_1608MetricR80
1600R at 100 MHz, 1.5 AL_0603_1608MetricL1
174HC595 contact-light driverPinSocket_1x16_P2.54mm_VerticalJ19
1ADS #1 DAISY_IN / CLKOUT stubPinSocket_1x04_P2.54mm_VerticalJ5
1ADS1299 module #1 analogue railsPinSocket_1x06_P2.54mm_VerticalJ23
1ADS1299 module #1 analogue signalsPinSocket_1x10_P2.54mm_VerticalJ2
1ADS1299 module #1 digitalPinSocket_1x12_P2.54mm_VerticalJ1
1ADS1299 module #2 analogue railsPinSocket_1x06_P2.54mm_VerticalJ29
1ADS1299 module #2 analogue signalsPinSocket_1x10_P2.54mm_VerticalJ4
1ADS1299 module #2 digitalPinSocket_1x12_P2.54mm_VerticalJ3
1ADuM4160 USB isolator, device sidePinSocket_1x04_P2.54mm_VerticalJ10
1AGND_REFTestPoint_Pad_D1.5mmTP13
1ATECC608B breakoutPinSocket_1x04_P2.54mm_VerticalJ11
1AVDDTestPoint_Pad_D1.5mmTP10
1AVSSTestPoint_Pad_D1.5mmTP11
1BTN_A response (green)SW_PUSH_6mm_H5mmSW1
1BTN_B response (blue)SW_PUSH_6mm_H5mmSW2
1BTN_STOP (red)SW_PUSH_6mm_H5mmSW3
1Boom microphone pigtail (TRRS)PinSocket_1x04_P2.54mm_VerticalJ18
1Boom-mic preamp module (part not settled, E-14)PinSocket_1x06_P2.54mm_VerticalJ21
1Buck-boost module, TPS63020 classPinSocket_1x06_P2.54mm_VerticalJ25
1CLK_ADSTestPoint_Pad_D1.5mmTP18
1Charge input from the panel USB-CJST_PH_B2B-PH-K_1x02_P2.00mm_VerticalJ24
1Charger + fuel gauge modulePinSocket_1x08_P2.54mm_VerticalJ12
1Codec microphone feedsPinSocket_1x04_P2.54mm_VerticalJ9
1DGNDTestPoint_Pad_D1.5mmTP14
1DIN 42802 EMG1 cheekDIN42802_1p5mm_SocketJ15
1DIN 42802 EMG2 submentalDIN42802_1p5mm_SocketJ16
1DIN 42802 EMG3 laryngealDIN42802_1p5mm_SocketJ17
1DRDYTestPoint_Pad_D1.5mmTP4
1DVDD3V3TestPoint_Pad_D1.5mmTP12
1Debug / programming headerPinSocket_1x06_P2.54mm_VerticalJ26
1ENV_ROOMTestPoint_Pad_D1.5mmTP9
1ENV_STIMTestPoint_Pad_D1.5mmTP7
1ENV_VOICETestPoint_Pad_D1.5mmTP8
1EOG / spare electrode headerPinSocket_1x03_P2.54mm_VerticalJ22
1ES8388 codec modulePinSocket_1x14_P2.54mm_VerticalJ8
1ESP32-S3-DevKitC-1 row APinSocket_1x22_P2.54mm_VerticalJ6
1ESP32-S3-DevKitC-1 row BPinSocket_1x22_P2.54mm_VerticalJ7
1Headphone jack pigtailPinSocket_1x04_P2.54mm_VerticalJ27
1Helmet harness -- contact lights (10-way)PinSocket_1x10_P2.54mm_VerticalJ30
1Helmet harness -- electrodes (12-way screened)PinSocket_1x12_P2.54mm_VerticalJ14
1I2S_BCLKTestPoint_Pad_D1.5mmTP5
1I2S_LRCKTestPoint_Pad_D1.5mmTP6
1MISOTestPoint_Pad_D1.5mmTP3
1MOSITestPoint_Pad_D1.5mmTP2
1NC_DRDY2TestPoint_Pad_D1.5mmTP17
1PESD5V0S2BTSOT-23D24
1PTC 1.1 A hold / 2.2 A tripR_1206_3216MetricF1
1Room microphone modulePinSocket_1x04_P2.54mm_VerticalJ28
1SCLKTestPoint_Pad_D1.5mmTP1
1TLV3201AIDBVSOT-23-5U7
1V5VTestPoint_Pad_D1.5mmTP16
1VSYSTestPoint_Pad_D1.5mmTP15
1microSD breakout, SDMMC 1-bitPinSocket_1x08_P2.54mm_VerticalJ20

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Questions

How big is the EEG CAR-01 RevB routed PCB?

It measures 150 × 130 mm and has 4 copper layers, 1.6 mm thick.

What parts does the EEG CAR-01 RevB routed use?

211 parts, built around the TLV3201AIDBV, BAV99, BAT54S and PESD5V0S2BT. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.

Where can I download the EEG CAR-01 RevB routed KiCad files?

From the stepvda/EEG-kit repository on GitHub, at the commit this page was made from: the board is kicad/EEG-CAR-01_RevB_routed.kicad_pcb and its schematic kicad/EEG-CAR-01_RevC.kicad_sch. PCBKit opens the board in the browser, with nothing to install.

Can I use the EEG CAR-01 RevB routed design in my own project?

Its repository states no licence, so its author keeps all rights: ask stepvda before reusing the design.