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2 layers18 × 16 mmLoop test, the printed circuit board in 3D

Intent-level PCB layout for AI agents

Size
18 × 16 mm
Copper layers
2
Thickness
1.6 mm
Parts
11
Nets
7
Pads
45
Tracks, vias
58, 12
Pours
2
Routed
Yes
KiCad
KiCad 10.0 (file 20260206)
Created
24 Oct 2026
Updated
25 Oct 2026

Overview

Loop test is an open-source printed circuit board by speck0413, from the speck0413/ai-native-eda repository on GitHub, published under the MIT licence. It is a 2-layer board of 18 × 16 mm with 11 parts on 7 nets, routed with 58 tracks and 12 vias.

It is built around the AP2112K-3.3 and USB4105-GF-A. Its parts include 4 resistors, 3 capacitors, 2 diodes, 1 IC and 1 connector.

Main components

2

README

README.md

ai-native-eda (aieda)

A workspace for designing PCBs from intent: TypeScript board.ts → linked KiCad 10 schematic/PCB → placement, routing and measured checks. Shared skills guide requirements, component verification, layout and release review. A new-project wizard covers the whole product, including firmware and apps when needed.

Start in a new session

Open the workspace where your project should live in Codex or Claude Code, then paste this prompt. It installs the toolchain and all 14 shared skills into that workspace, after inspecting existing files and agreeing on changes:

text
Set up ai-native-eda in the current workspace and help me start or resume my hardware product.

First inspect this workspace read-only: project instructions, git status, aieda.json, existing toolchains, board/library paths, skills, dependency manifests and software. Preserve accepted decisions and existing work. Find a usable local ai-native-eda toolchain first. Otherwise check https://github.com/speck0413/ai-native-eda/releases for an actual published release with an aieda ZIP and SHA-256 file; verify its checksum. If none exists, propose a pinned source checkout from https://github.com/speck0413/ai-native-eda instead. Do not assume a documented version is published or extract over an existing directory.

Propose concrete keep/add/merge/replace actions for the toolchain, all pcb-* skill packages for this host, aieda.json, project instructions, library/board paths, dependency configuration and ignore rules. Explain conflicts and recommend which existing files should be kept. Show merged content or diffs for existing-file changes and backups for replacements. Ask my explicit permission before modifying or replacing existing workspace files; do not treat silence as approval. Reuse permission already given for specific actions. Do not copy the toolchain's development work queue into my project's instructions.

Once the proposed setup is approved, install the matching toolchain and run python3 <toolchain>/scripts/install-skills.py --workspace <workspace> --host codex (or claude/both for the agreed hosts) --plan. Review its read-only plan before installation; use --skip HOST:SKILL to retain an existing edited package, and individual --replace HOST:SKILL flags only for replacements I approved. Install complete packages including references. Run <toolchain>/bin/aieda setup, then AIEDA_NO_BOOTSTRAP=1 <toolchain>/bin/aieda doctor. Initialize project paths only as agreed and report missing system tools. Record the revision or release checksum; explain if a new session is needed to discover skills.

Read pcb-project-wizard and pcb-project-setup from the installed skills. Interview me about the product, hardware, prototype/production goals, and any firmware, web, desktop, mobile or backend requirements. Software may be not applicable; ask which surfaces I want before choosing frameworks or connectivity. Reuse existing specifications. Produce draft requirements and a phased project plan with interfaces and acceptance criteria for my approval before implementing a board or software milestone. Load pcb-process and pcb-toolchain before board work. Keep the repository DevKit unrouted (zero tracks/vias), working on a copy for experiments. Explain verification, physical orientation and manual release-review requirements without claiming untested hardware is production ready.

Already working in this repository? The skills are present. Paste this shorter prompt:

text
Read AGENTS.md and the pcb-project-wizard, pcb-project-setup, pcb-process and pcb-toolchain skills. Inspect the current workspace and run AIEDA_NO_BOOTSTRAP=1 bin/aieda doctor. Help me start a new hardware product or resume the existing one: establish the product scope and any firmware/apps, reuse approved decisions, then draft the requirements and implementation plan for review. Propose file paths and ask permission before modifying or replacing existing project files unless I already authorized those exact changes. Preserve the DevKit's unrouted reference; use a copy or temporary output. Report missing tools and unresolved requirements before design work.

See SETUP.md for manual installation, prerequisites and checks. The wizard is pcb-project-wizard; it can record no software for an analog regulator, firmware for a feeder, or multiple app surfaces for a controller, according to your requirements.

What it does

  • aieda build <board.ts> creates linked KiCad projects, runs schematic ERC/parity, placement, Freerouting and DRC, and records automated evidence.
  • aieda q <board.ts|output-dir> summary|checks|drc|unconnected|part|pin|net|place|reqs|si|pdn|bench|… provides measured text feedback.
  • New boards default to tracks in 45° increments and chamfered signal bends. Checks inspect actual exported copper, including router fanouts; see routing geometry policy for explicit power-net classification and other approved styles.
  • aieda orientation creates per-part enlarged footprint/3D views; aieda review creates pending manual review and bench-plan records.
  • aieda verify reports shared release blockers. aieda fab exports Gerbers/BOM/CPL and an orientation guide, but exits unsuccessfully while release is blocked. Exported files alone do not mean order readiness.
  • aieda doctor, setup, init and new inspect tools, install dependencies, record your layout and seed a board.

Current working-tree version: v0.2.1. The ESP32-C3 DevKit is an intentionally unrouted exercise: 43 parts, four layers, zero tracks and zero vias, with linked schematic/PCB. Smoke is the routed regression reference. Neither board has been ordered or bench tested. Every board requires tracks and explicit trace specifications; genuinely absent planes/vias can be not applicable with evidence. Automated and manual release gates, including physical pin-1/polarity and assembly-preview review, are described in VERIFICATION.md.

Codex discovers .agents/skills/; its skill packages share maintained content with .claude/skills/. In a source checkout these are symlinks; the release ZIP expands them into real directories. .claude/agents/ contains optional role briefs, not Codex agent configuration. Follow your session's model and delegation capabilities.

The optional Claude Code CLI plugin installs skills, role briefs and an aieda command shim:

text
/plugin marketplace add speck0413/ai-native-eda
/plugin install aieda@ai-native-eda

The plugin still needs a matching toolchain checkout/release and system tools. Its CLI bin/ shim is not supported by claude.ai/Cowork. Use the direct toolchain command for Codex.

Portable archive and skill installation

When published, release assets are available from GitHub Releases. Check the assets actually exist; the current v0.1.1 working tree is not evidence of a published tag or ZIP. From a downloaded or locally prepared archive:

sh
sha256sum -c aieda-v<version>.zip.sha256
# Choose an empty staging directory; inspect before moving it into your project.
unzip aieda-v<version>.zip -d <empty-staging-dir>
python3 <toolchain>/scripts/install-skills.py --workspace . --host codex --plan
# After reviewing the plan and approving any existing-file changes:
python3 <toolchain>/scripts/install-skills.py --workspace . --host codex
<toolchain>/bin/aieda setup
AIEDA_NO_BOOTSTRAP=1 <toolchain>/bin/aieda doctor

The installer adds missing skill packages, keeps identical packages, supports --skip HOST:SKILL to retain an edited package while installing others, and refuses changed packages unless their individual --replace HOST:SKILL action was approved. Approved replacements receive backups. It does not merge project instructions or configure your board paths; the startup workflow proposes those separately. Use --host claude or both if needed. KiCad 10 and Java 21+ are separate system prerequisites.

Codex's $skill-installer can install packages from .claude/skills/pcb-* at an existing chosen revision into its global skill directory, including references. That is an alternative to workspace installation, and does not install the toolchain. Use maintained .claude/skills/ directories because GitHub skill installation may reject source .agents/skills/ symlink paths.

Prepare an archive from the current tree with python3 scripts/package-release.py --out /tmp/aieda-release. It includes a per-file hash manifest and checksum. The release workflow attaches assets to an already published release, or provides a manual Actions artifact; it does not create tags or publish releases.

Audit scope, fixes, validation and remaining limits: repository audit.

Architecture: docs/SOLUTION.md. Development instructions: AGENTS.md. Current work queue: TODO.md. Historical experiments: docs/BAKEOFF.md.

License: MIT, see LICENSE.

Parts

11
QtyValueFootprintReferences
210uCapacitor_SMD:C_0603_1608MetricC1, C2
21kResistor_SMD:R_0402_1005MetricR3, R4
25.1kResistor_SMD:R_0402_1005MetricR1, R2
1100nCapacitor_SMD:C_0402_1005MetricC3
1AP2112K-3.3Package_TO_SOT_SMD:SOT-23-5U1
1USB4105-GF-AConnector_USB:USB_C_Receptacle_GCT_USB4105-xx-A_16P_TopMnt_HorizontalJ1
1greenLED_SMD:LED_0603_1608MetricD1
1redLED_SMD:LED_0603_1608MetricD2

Questions

How big is the Loop test PCB?

It measures 18 × 16 mm and has 2 copper layers, 1.6 mm thick.

What parts does the Loop test use?

11 parts, built around the AP2112K-3.3 and USB4105-GF-A. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.

Where can I download the Loop test KiCad files?

From the speck0413/ai-native-eda repository on GitHub, at the commit this page was made from: the board is examples/bakeoff/r3/opus/loop-test/kicad/loop-test.kicad_pcb. PCBKit opens the board in the browser, with nothing to install.

Can I use the Loop test design in my own project?

Its repository publishes it under the MIT licence: you may reuse it on that licence's terms (keep the author's notice, and for a copyleft licence share your changes alike).

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