2 layers198.1 × 193 mm
STE25
stonedDiscord/Automatenplatinen
Reverse engineerte Hardware aus deutschen Spielautomaten.
252 parts5BSD-2-Clause
2 layers100.1 × 56.5 mm
FC SxROM
ponchick/FC-SxROMCartridge PCB with an MMC1 mapper implemented on the **AX5904** IC.
- Size
- 100.1 × 56.5 mm
- Copper layers
- 2
- Thickness
- 1.6 mm
- Parts
- 30
- Nets
- 82
- Pads
- 262
- Tracks, vias
- 765, 62
- Pours
- 1
- Routed
- Yes
- KiCad
- KiCad 9.0 (file 20241229)
- Created
- 3 May 2026
- Updated
- 3 May 2026
Overview
FC SxROM is an open-source printed circuit board by ponchick, from the ponchick/FC-SxROM repository on GitHub, published under the CERN-OHL-P-2.0 licence. It is a 2-layer board of 100.1 × 56.5 mm with 30 parts on 82 nets, routed with 765 tracks and 62 vias.
It is built around the BAT85 and BC547. Its parts include 6 capacitors, 5 resistors, 4 ICs, 2 diodes and 1 transistor. It belongs with the retro computing and games boards of this library.
Main components
2README
README.mdFC-SxROM
Cartridge PCB with an MMC1 mapper implemented on the AX5904 IC.
The following board types are supported:
SEROM, SHROM, SH1ROM, SNROM, SUROM.
Russian version: README.ru.md
Jumper configuration
SNROM / OTHER
SNROM uses 8 KB CHR-ROM or CHR-RAM. In this mode the high CHR bank select line (CHR A16, bit 4 of the bank number) acts as an extra CE for PRG-RAM.
- Right position — SNROM mode.
- Left position — all other board types (
OTHER).
Solder both SNROM/OTHER jumpers for the mode you need.
SEROM / SHROM / SH1ROM / OTHER
Boards with 32 KB PRG-ROM (SEROM, SHROM, SH1ROM), for example Dr. Mario, do not route PRG A14 to the MMC1 — A14 goes straight to the NES instead. As a result the $E000 register does not work, and all 32 KB of PRG-ROM are mapped at $8000–$FFFF with no bank switching.
- Right position — SEROM, SHROM, or SH1ROM mode.
- Left position — other types (
OTHER).
NO BATTERY
This jumper controls PRG RAM power and the battery-backed save circuit.
- If PRG RAM is used but saves are not required — bridge the
NO BATTERYjumper. You may omit the following parts:
BT1,R2,R5,D1,D2,C5,C6. - If PRG RAM is not used at all — do not bridge
NO BATTERY. You also do not need:
U4(PRG RAM IC),R2,R4,Q1, plus all parts from the list above (BT1,R5,D1,D2,C5,C6).
CHR ROM / CHR RAM
Selects pattern table memory type (CHR). Three jumpers are used; they are all set the same way.
- Upper position (
CHR ROM) — ROM is used. - Lower position (
CHR RAM) — RAM is used.
EEPROM / FLASH / UV EPROM
Two three-position jumpers route pins 1 and 31 of the ROM IC, because their functions depend on the memory type.
- UV EPROM (e.g. 27C4001):
pin 1 —VPP, pin 31 —A18.
For this mode set the jumpers to the lower position. Pin 31 receivesA18, pin 1 receivesVPP(typically raisedVCC). - EEPROM / FLASH (e.g. 39SF040, 29F040, 28C040):
pin 1 —A18, pin 31 —WE#(for read modeWE#must be pulled toVCC).
For this mode set the jumpers to the upper position.
Set the jumpers to match the ROM IC you install.
License
This project is licensed under CERN Open Hardware Licence Version 2 – Permissive (CERN-OHL-P-2.0).
See LICENSE for details.
SPDX-License-Identifier: CERN-OHL-P-2.0
Parts
30| Qty | Value | Footprint | References |
|---|---|---|---|
| 4 | 0.1u | Capacitor_THT:C_Disc_D4.3mm_W1.9mm_P5.00mm | C2, C3, C4, C5 |
| 2 | 1k | Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal | R2, R3 |
| 2 | 22u | Cart:CP_Radial_D4mm_L7mm_Horizontal-L | C1, C6 |
| 2 | BAT85 | Diode_THT:D_DO-35_SOD27_P7.62mm_Horizontal | D1, D2 |
| 1 | 100k | Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal | R5 |
| 1 | 10k | Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal | R4 |
| 1 | 2032 | Battery:BatteryHolder_Keystone_3034_1x20mm | BT1 |
| 1 | 27k | Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal | R1 |
| 1 | AX5904 | Package_DIP:DIP-24_W7.62mm | U3 |
| 1 | BC547 | Package_TO_SOT_THT:TO-92_Inline_Horizontal2 | Q1 |
| 1 | CHR ROM/RAM | Cart:DIP-32_Triple | U2 |
| 1 | CHR28 | Cart:Jumper-3 | JP4 |
| 1 | CHR29 | Cart:Jumper-3 | JP5 |
| 1 | CHR30 | Cart:Jumper-3 | JP6 |
| 1 | FAMICOM_EDGE | Cart:CONN_EDGE_2x60 | J1 |
| 1 | LOGO | 0-Logo:ponchick | LOGO# |
| 1 | NO BATTERY | Jumper:SolderJumper-2_P1.3mm_Open_Pad1.0x1.5mm | JP9 |
| 1 | PIN1 | Cart:Jumper-3 | JP2 |
| 1 | PIN31 | Cart:Jumper-3 | JP3 |
| 1 | PRG RAM | Cart:DIP-28_Dual | U4 |
| 1 | PRG ROM | Package_DIP:DIP-32_W15.24mm_Socket | U1 |
| 1 | SEROM/SHROM | Cart:Jumper-3 | JP1 |
| 1 | SNROM1 | Cart:Jumper-3 | JP7 |
| 1 | SNROM2 | Cart:Jumper-3 | JP8 |
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Questions
How big is the FC SxROM PCB?
It measures 100.1 × 56.5 mm and has 2 copper layers, 1.6 mm thick.
What parts does the FC SxROM use?
30 parts, built around the BAT85 and BC547. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.
Where can I download the FC SxROM KiCad files?
From the ponchick/FC-SxROM repository on GitHub, at the commit this page was made from: the board is FC-SxROM.kicad_pcb and its schematic FC-SxROM.kicad_sch. PCBKit opens the board in the browser, with nothing to install.
Can I use the FC SxROM design in my own project?
Its repository publishes it under the CERN-OHL-P-2.0 licence: you may reuse it on that licence's terms (keep the author's notice, and for a copyleft licence share your changes alike).