Faikout

ESP32-Faikout (Cost-Optimized Re-design)

This repository contains a hardware redesign of the ESP32-Faikout, originally created by RevK.

This project is specifically optimized for JLC-PCB PCBA (Assembly service). The PCB dimensions are slightly larger, see the measurements below.

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🚀 Key Improvements in this Revision

This version introduces several technical optimizations to lower costs and improve manufacturing reliability:

• Streamlined BOM: The Bill of Materials has been reduced from 17 lines to 13 lines, minimizing component variety and simplifying the assembly process.
• JLC "Basic" Parts: Wherever possible, I have selected parts from the JLC Basic Library.
• 4-Layer PCB Stackup: Upgraded from 2 layers to a 4-layer design. This allows for dedicated power/ground planes (still keeping low cost).
• No 0201 Components: I have intentionally avoided 0201 footprints.
• Revised Form Factor: The smallest module size is now 45mm x 16mm (up from 40mm x 16mm). This slight increase allows for the use of more common 0402 components.
• Manufacturing Ready: The project is designed to be produced as a 70mm x 70mm panel (using JLC’s automatic panelization). This panel can then be broken down into various sizes as needed.
• Avoid Baking: Replaced moisture-sensitive components from the original design to bypass the extra cost and time required for pre-assembly baking.
• Ground-up PCB/SCH Redesign: The project features a reworked schematic and layout to support the updated BOM and manufacturing optimizations.

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📜 Credits and Attribution

This project is a hardware derivative of the original ESP32-Faikout. All credit for the core concept, original schematics, and firmware goes to:

• Original Repository: Codeberg - RevK/ESP32-Faikout

[NOTE]
This hardware revision is derived from commit 2c54c5f.

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⚖️ License

This hardware redesign follows the licensing intent of the original project. Please consult the original repository for specific licensing terms regarding the firmware and base design.

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Note for Users

If you are looking for the latest firmware updates or the full history of the project, please refer to RevK's original repository. This repo focuses specifically on the cost-optimized hardware layout and JLC-PCB manufacturing files.

How to order from JLC

Download the files from the releases, or generate the Gerber files yourself.
Go to the JLCPCB website, select “Get Instant Quote,” and upload the Gerber ZIP file.
You can flag "Specify Stackup" and select the "JLC04161H-3313", to have controlled impedance on the USB tracks.
Keep in mind that the ESP32-S3-MINI-1-N4R2 do not support economic assembly but only standard.
During the placement process, if you see a warning like the one below, simply click OK.

The component placement should look like this, please check it carefully and ensure the orientation is correct. In most cases, JLCPCB will follow up with a confirmation email after reviewing the placement, asking you to verify that everything is correct. Review it thoroughly, as in my experience they may occasionally rotate diode packages by 180°.

V-cut issue

I usually prefer to place V-cuts on a separate layer and then ask JLCPCB in the remarks section to apply them. However, this time they ignored the request and did not perform the V-cuts, so I had to CNC the board myself. For your convenience, I’ve pushed a new commit where the V-cut layer is merged with the Edge Cuts layer, as required by JLCPCB’s documentation. I still recommend enabling the “Confirm Production File” option so you can review the files JLCPCB will send to production and verify that the V-cuts are included.