

Version 5 (FINAL)
DoA project
- Size
- 100 × 100 mm
- Copper layers
- 2
- Thickness
- 1.6 mm
- Parts
- 68
- Nets
- 142
- Pads
- 297
- Tracks, vias
- 603, 75
- Pours
- 1
- Routed
- Yes
- KiCad
- KiCad 9.0 (file 20241229)
- Created
- 12 Mar 2026
- Updated
- 23 Mar 2026
Overview
Version 5 (FINAL) is an open-source printed circuit board by Mphoentle1, from the Mphoentle1/EEE3088F repository on GitHub. It is a 2-layer board of 100 × 100 mm with 68 parts on 142 nets, routed with 603 tracks and 75 vias.
It is built around the AD8606ARZ and CMM-2718AT-42308-TR. Its parts include 26 capacitors, 7 resistors, 5 ICs and 2 connectors. It belongs with the STM32 boards of this library.
Main components
2AD8606ARZ
SOIC-8-40℃~+125℃ 0.5pA 1.2mA 100dB 10MHz 1pA 2 2.7V~5.5V 4.5uV/℃ 5V/us 80mA 80uV 8nV/√Hz@1kHz ESD protection、Built-in compensation、Overvoltage protection、Reverse-phase input protection Rail-to-Rail Input, Rail-to-Rail Output SOIC-8 Precision Op Amps ROHSAnalog DevicesPrecision Op AmpsCMM-2718AT-42308-TR
--40℃~+100℃ -42dB 0.95mm 1.6V~3.6V 1.85mm 2.75mm 300Ω 60dB 80uA Analog output Omnidirectional Omnidirectional pickup - MEMS Microphones ROHSCUIMEMS Microphones
README
README.mdEEE3088F
DoA project
This project involves the design and implementation of a high-precision acoustic sensor capable of determining the Direction of Arrival (DoA) of a specific 2000 Hz beacon. The system integrates custom analog front-end hardware with a high-performance STM32F429ZGT6 microcontroller to process signals in real-time under strict latency constraints.
Technical Specifications
Target Frequency: 2000 Hz Sampling Rate: 20,000 Hz (5x oversampling for phase accuracy) Microphone Spacing: 50 mm Supply Voltage: 3.3V DC (Strictly compliant with Automated Testing Rig) Communication: I2C Slave (Address: 0x42) Latency Ceiling: < 50ms from trigger to DoA result
System Architecture
Analog Front-End The signal chain uses a Zilltek ZTS6618 top-ported MEMS microphone for superior assembly reliability. The analog path includes: AC Coupling: Blocks microphone DC offset.Active Bandpass Filter: A Multiple Feedback (MFB) topology using the AD8605 rail-to-rail op-amp, providing ~40dB of gain. DC Biasing: Centering the signal at 1.65V for unipolar ADC sampling. Digital ProcessingADC Acquisition: High-speed sampling triggered by the Rig state-machine. DSP Algorithm: Cross-correlation (CCF) performed on the STM32's hardware Floating Point Unit (FPU) to calculate the time-of-flight difference between the microphone pair. Register Interface: Results are reported via 32-bit IEEE 754 float registers.
📂 Repository Structure
/Hardware: KiCad PCB files, LTspice simulations, and Bill of Materials (BOM). /Firmware: STM32CubeIDE project (C code), including CMSIS-DSP implementation. /instruction_sheets: M1 Technical Contract and Physics Baseline proofs.
Parts
68| Qty | Value | Footprint | References |
|---|---|---|---|
| 16 | 100nF | Design-EEE3088F:C0805 (CAPACITOR) | C5, C6, C12, C13, C14, C15, C16, C23, C24, C25, C26, C27, Cbias1, Cbias2, Cin1, Cin2 |
| 5 | 10K | Design-EEE3088F:R0805 (RESISTOR) | R1, R2, R15, R16, R17 |
| 4 | 10nF | Design-EEE3088F:C0805 (CAPACITOR) | C2, C3, C30, C31 |
| 4 | 82K | Design-EEE3088F:R0805 (RESISTOR) | Rf4, Rf5, Rg4, Rg8 |
| 4 | AD8606ARZ | Design-EEE3088F:AD8606ARZ-REEL7 (OPAMP) | U1, U4, U5, U6 |
| 3 | 10uF | Design-EEE3088F:C0805 (CAPACITOR) | C1, C7, C29 |
| 2 | 100K | Design-EEE3088F:R0805 (RESISTOR) | Rf1, Rf3 |
| 2 | 1K | Design-EEE3088F:R0805 (RESISTOR) | Rf2, Rf6 |
| 2 | 2.2uF | Design-EEE3088F:C0805 (CAPACITOR) | C4, C11 |
| 2 | 2.7K | Design-EEE3088F:R0805 (RESISTOR) | Rg2, Rg9 |
| 2 | 3.3K | Design-EEE3088F:R0805 (RESISTOR) | Rg1, Rg3 |
| 2 | 4.7K | Design-EEE3088F:R0805 (RESISTOR) | R3, R9 |
| 2 | CMM-2718AT-42308-TR | Design-EEE3088F:XDCR_CMM-2718AT-42308-TR (MIC) | MIC1, MIC2 |
| 2 | Mic Voltage | TestPoint:TestPoint_Pad_2.0x2.0mm | TP6, TP11 |
| 2 | MountingHole | MountingHole:MountingHole_3.2mm_M3 | H1, H2 |
| 2 | TP-GND | TestPoint:TestPoint_Pad_2.5x2.5mm | TP2, TP9 |
| 2 | TP-SIGNAL | TestPoint:TestPoint_Pad_2.0x2.0mm | TP1, TP7 |
| 2 | TP-VCC | TestPoint:TestPoint_Pad_2.0x2.0mm | TP3, TP5 |
| 1 | 4.7uF | Design-EEE3088F:C0805 (CAPACITOR) | C28 |
| 1 | Conn_01x04 | Connector_PinHeader_2.54mm:PinHeader_1x04_P2.54mm_Horizontal | J1 |
| 1 | Conn_01x05 | Connector_PinHeader_2.54mm:PinHeader_1x05_P2.54mm_Vertical | J2 |
| 1 | STM32F429ZGTx | Package_QFP:LQFP-144_20x20mm_P0.5mm | U11 |
| 1 | TP-BIAS-L | TestPoint:TestPoint_Pad_2.0x2.0mm | TP10 |
| 1 | TP-BIAS-R | TestPoint:TestPoint_Pad_2.0x2.0mm | TP8 |
| 1 | TP-SCL | TestPoint:TestPoint_Pad_2.0x2.0mm | TP12 |
| 1 | TP-SDA | TestPoint:TestPoint_Pad_2.0x2.0mm | TP4 |
Questions
How big is the Version 5 (FINAL) PCB?
It measures 100 × 100 mm and has 2 copper layers, 1.6 mm thick.
What parts does the Version 5 (FINAL) use?
68 parts, built around the AD8606ARZ and CMM-2718AT-42308-TR. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.
Where can I download the Version 5 (FINAL) KiCad files?
From the Mphoentle1/EEE3088F repository on GitHub, at the commit this page was made from: the board is Hardware/Final Design/Version 5 (FINAL).kicad_pcb and its schematic Hardware/EEE3088F Project.kicad_sch. PCBKit opens the board in the browser, with nothing to install.
Can I use the Version 5 (FINAL) design in my own project?
Its repository states no licence, so its author keeps all rights: ask Mphoentle1 before reusing the design.
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