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4 layers157.5 × 111.8 mmPump Interface, the printed circuit board in 3D

MT Drive is an open-source, 4-channel PWM controller for DC pumps and motors, developed by Mighty Tronics. This repository hosts project documentation and the PCB master drawing to support reproducible builds, hardware modifications and an application for OSHWA certification.

Size
157.5 × 111.8 mm
Copper layers
4
Thickness
1.57 mm
Parts
87
Nets
32
Pads
191
Tracks, vias
275, 4
Pours
6
Routed
Yes
KiCad
KiCad 10.0 (file 20260206)
Created
26 Sep 2026
Updated
13 Oct 2026

Overview

Pump Interface is an open-source printed circuit board by Mighty-Tronics, from the Mighty-Tronics/MightyDrive repository on GitHub, published under the CERN-OHL-S-2.0 licence. It is a 4-layer board of 157.5 × 111.8 mm with 87 parts on 32 nets, routed with 275 tracks and 4 vias.

It is built around the 74AHCT125D, 15SQ100 and IRLZ44N, with the 1.5KE43A among its other parts. Its parts include 31 capacitors, 20 resistors, 10 diodes, 4 transistors and 4 fuses. It belongs with the interfaces and adapters boards of this library.

Main components

4

README

README.md

MT Drive — Four-Channel PWM Pump Interface

Certified Open Source Hardware — OSHWA LU000003

PCB 3D

PCB-photo1

PCB-photo2

PCBA-photo

MT Drive is an open-hardware power interface for controlling up to four brushed DC pumps or comparable inductive DC loads from an external microcontroller.

Each channel accepts an independent PWM command and switches the load through a protected low-side MOSFET stage. The microcontroller, firmware, regulated +5 V logic supply, motor supply and pumps remain external to the board.

Hardware status: prototype revision V2.0, manufactured by JLCPCB and under qualification.
Published electrical rating: 2 A continuous per channel, 8 A continuous total.
Extended operation: up to 3 A per channel may be characterized, but is not guaranteed for this hardware revision.

Main specifications

Schematic

PCB

CharacteristicPublished specification
Number of channels4 independent outputs
Motor supply5–36 V DC, externally supplied
Continuous current2 A maximum per channel
Aggregate continuous current8 A maximum
Extended characterizationUp to 3 A per channel / 12 A total, not guaranteed
PWM frequency31.5 kHz nominal
PWM input levels3.3 V or 5 V logic
Logic supplyRegulated +5 V external supply
Switching topologyN-channel MOSFET, low-side switching
Intended ambient range−10 °C to +50 °C
Galvanic isolationNone; logic and motor power use a common ground
Hardware referencePump Interface schematic V2.0, dated 24 April 2026

At 36 V and the published current rating, the board can deliver up to 72 W per load and 288 W to four loads. These values are load power, not PCB dissipation.

Functional operation

Power entry

The motor supply enters through J1:

  • PWR: positive motor supply, 5–36 V DC;
  • GND: common power and logic reference.

The common input stage includes:

  • D5 15SQ100 series Schottky diode for reverse-polarity protection;
  • D6 1.5KE43A TVS diode for supply transient suppression;
  • C1 1000 µF, C2 10 µF and C3 100 nF for rail decoupling;
  • TP1 and TP2 for protected Vin+ and ground measurements.

PWM command path

Each PWM input passes through a 1 kΩ series resistor and a 100 kΩ pull-down before entering one section of the 74AHCT125 buffer. The buffer is powered from +5 V and adapts a 3.3 V or 5 V controller signal to the 5 V MOSFET gate-control network.

The 74AHCT125 has been bench-tested for this level-adaptation function. It carries gate-drive current only and does not determine the motor-current rating.

The four buffer outputs are permanently enabled because their active-low /OE inputs are tied to ground. Gate pull-down resistors keep the MOSFETs off when the controller is disconnected or its outputs are high-impedance.

Load switching

When a PWM command is high, the corresponding IRLZ44N MOSFET turns on. Current flows from Vin+, through the channel PTC, through the external load connected between Mx+ and Mx−, and through the MOSFET to ground.

When the MOSFET turns off, the channel flyback diode maintains a local path for the inductive load current. A 22 Ω + 1 nF series RC snubber damps high-frequency ringing across each motor output.

Connections

J2 — Logic and PWM

PinSignalDescription
1+5 VExternal regulated logic supply
2GNDCommon controller and power-stage reference
3PWM1Channel 1 command
4PWM2Channel 2 command
5PWM3Channel 3 command
6PWM4Channel 4 command

J3 — Pump outputs

PinSignalPinSignal
1M3+2M3−
3M4+4M4−
5M2+6M2−
7M1+8M1−

Test points

Test pointSignal
TP1Protected motor rail Vin+
TP2GND
TP3Channel 1 gate, Qg1
TP10Channel 2 gate, Qg2
TP11Channel 3 gate, Qg3
TP12Channel 4 gate, Qg4

Protection and reliability architecture

Each channel contains:

  • one MF-R500 resettable PTC in the positive load feed;
  • one 15SQ100 flyback diode;
  • local 22 µF + 100 nF supply decoupling;
  • one 22 Ω / 0.5 W + 1 nF series RC snubber;
  • a 10 kΩ MOSFET gate pull-down;
  • a 1N4148 gate clamp and gate-conditioning capacitors.

The protections have different roles and do not replace one another. The PTC limits sustained fault energy but is not a precision current limiter. The flyback diode controls inductive current, the snubber damps local ringing, and the TVS limits disturbances reaching the common supply rail.

The 55 V IRLZ44N has 19 V of absolute drain-voltage headroom at a 36 V supply. The internal qualification target is a repetitive VDS peak no greater than 45 V under the published load, worst switching condition and longest intended motor cable.

Current and thermal basis

The 2 A/channel rating is based on the complete current path rather than on the headline rating of a single semiconductor.

  • Four channels at 2 A give an 8 A continuous common-path current.
  • Using the 15SQ100 maximum forward-voltage screening value of 0.82 V gives a conservative D5 loss bound of 6.56 W at 8 A. Actual forward drop and case temperature must be measured.
  • The MF-R500 hold current falls with ambient temperature; 2 A retains useful margin up to the declared +50 °C design ambient.
  • MOSFET conduction and switching losses are verified at 31.5 kHz from measured gate and drain waveforms.
  • Power-component case temperatures are checked against the 90 °C internal qualification target.

Operation above 2 A per channel, up to 3 A, is an engineering-characterization region only. It depends on duty cycle, pump start and stall current, ambient temperature, airflow, wiring, connector losses and simultaneous channel loading.

Integration requirements

  1. Connect the controller ground to J2 GND before applying PWM signals.
  2. Apply a regulated +5 V supply to J2; the board does not generate this voltage.
  3. Use a current-limited motor supply for first power-up.
  4. Size the supply, connectors and cable loop for 8 A continuous total current plus pump start-current transients.
  5. Keep PWM and ground wiring short and route motor cables away from sensitive logic wiring.
  6. Do not exceed 2 A continuous on any channel or 8 A continuous in total within the published specification.
  7. Verify each pump's start and stall current before qualification in the final system.

The board does not regulate motor voltage, provide active electronic current limiting or provide galvanic isolation. It is a component for integration, not a complete protected end product.

Validation plan

The production-representative board is verified using the following sequence:

  1. Inspect component orientation, solder joints and unpowered resistance paths.
  2. Apply logic power only and verify all four PWM inputs, buffer outputs and MOSFET gates at 3.3 V and 5 V input levels.
  3. Test each channel with a current-limited resistive load before connecting pumps.
  4. Verify operation at 31.5 kHz and 10%, 50% and 90% duty cycle.
  5. Qualify one channel at 36 V / 2 A over the full duty-cycle range.
  6. Qualify four simultaneous channels at 36 V / 2 A per channel after thermal stabilization.
  7. Measure MOSFET VDS peaks and ringing with the longest intended cable.
  8. Record start, stall, reverse-polarity, endurance and high-ambient behaviour.
  9. Characterize operation progressively above 2 A and up to 3 A separately, without changing the published rating.
  10. Complete EMC pre-compliance tests using the final PCB, pumps, supply and cabling.

No CE conformity claim is made solely from this prototype or this repository. Regulatory assessment applies to the final integrated product and its intended use.

Repository contents

The repository separates editable design sources from documentation and generated manufacturing outputs:

LocationContents
Documentation/BOM in ODS and CSV formats; schematic images; drill maps; Gerber and Excellon manufacturing files in a ZIP archive; Master Drawing; functional and engineering notes.
Kicad_Files/Native KiCad files for viewing and editing the schematic and PCB.
README.mdProject overview, specifications, integration guidance and certification information.
LICENSE.mdProject licence information.

The native KiCad files are the authoritative editable design sources. Rendered schematics, PDFs and manufacturing files are provided for convenient review and production, but do not replace the native source files.

Every hardware release must identify its PCB revision or release date and match it to an immutable repository tag, BOM, schematic, layout and validation evidence.

Master Drawing — Pump Interface, Rev A

OSHWA certification

OSHWA Certified Open Source Hardware — LU000003

MT Drive is certified open source hardware under the Open Source Hardware Association (OSHWA) certification program. The project is registered as Mighty Drive in the official OSHWA directory.

Certification informationDetails
Registered project nameMighty Drive
Unique identifier (UID)LU000003
Certification date3 October 2026
Official registrationOSHWA project record — LU000003

OSHWA certification identifies projects that comply with the Open Source Hardware Definition. The editable design files and project documentation are published so that users can study, modify, build and distribute the design under the applicable licence.

Certification scope: OSHWA certification concerns open-source hardware compliance. It does not certify electrical performance, product safety or CE/EMC conformity. Hardware qualification and final-system regulatory assessment are addressed separately in the validation plan above.

The certification mark and UID refer to the project covered by the official registration. Use of the mark follows the OSHWA Certification Mark Usage Guidelines.

License

The hardware design and original project documentation are released under the CERN Open Hardware Licence Version 2 — Strongly Reciprocal (CERN-OHL-S-2.0). See LICENSE.md and the official CERN-OHL-S v2 licence text for the applicable terms.

Project materialLicense
Hardware design, schematic, PCB, fabrication files and BOMCERN-OHL-S-2.0
Original project documentationCERN-OHL-S-2.0
Software or firmwareNone included in this release

Third-party data sheets and manufacturer files retain their owners' respective rights and are not relicensed by their inclusion or citation. The OSHWA certification mark remains subject to OSHWA's own usage terms.

Documentation

The detailed functional description, engineering calculations, component-level implementation and qualification criteria are provided in the project documentation under Documentation/.

Maintainer

info@mightytronics.eu

Parts

87
QtyValueFootprintReferences
81nFCapacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mmC4, C5, C6, C7, C24, C27, C28, C29
6100nFCapacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mmC3, C17, C19, C21, C23, C26
515SQ100Diode_THT:D_DO-201AD_P15.24mm_HorizontalD1, D2, D3, D4, D5
4100Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_HorizontalR13, R14, R15, R16
4100KResistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_HorizontalR17, R18, R19, R20
4100pFCapacitor_THT:C_Disc_D3.4mm_W2.1mm_P2.50mmC8, C10, C12, C15
410KResistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_HorizontalR5, R6, R7, R8
41KResistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_HorizontalR21, R22, R23, R24
41N4148Diode_THT:D_DO-35_SOD27_P7.62mm_HorizontalD7, D8, D9, D10
41nFCapacitor_THT:C_Rect_L7.2mm_W2.5mm_P5.00mm_FKS2_FKP2_MKS2_MKP2C9, C11, C13, C14
4220Resistor_THT:R_Axial_DIN0411_L9.9mm_D3.6mm_P12.70mm_HorizontalR9, R10, R11, R12
422uFCapacitor_THT:CP_Radial_D6.3mm_P2.50mmC16, C18, C20, C22
4IRLZ44NPackage_TO_SOT_THT:TO-220-3_VerticalQ1, Q2, Q3, Q4
4MF-R500 5A PTCFuse:Fuse_Littelfuse-LVR100F1, F2, F3, F4
4MountingHole_3.2mm_M3_ISO14580_PadMountingHole:MountingHole_3.2mm_M3_ISO14580_PadM1, M2, M3, M4
3Fiducial_1.5mm_Mask3mmFiducial:Fiducial_1.5mm_Mask3mmFid1, Fid2, Fid3
11.5KE43ADiode_THT:D_DO-201AD_P15.24mm_HorizontalD6
11000uFCapacitor_THT:CP_Radial_D12.5mm_P5.00mmC1
1100nFCapacitor_SMD:C_0805_2012MetricC34
1100uFCapacitor_THT:CP_Radial_D6.3mm_P2.50mmC25
110uFCapacitor_THT:CP_Radial_D6.3mm_P2.50mmC2
11uFCapacitor_SMD:C_0805_2012MetricC35
174AHCT125Package_SO:SOIC-14_3.9x8.7mm_P1.27mmU1
1GndTestPoint:TestPoint_Pad_1.5x1.5mmTP2
1LOGOLogos:Logo-MT-PCBMighty Tronics®
1PWM TerminalTerminalBlock_WAGO:TerminalBlock_WAGO_233-506_2x06_P2.54mmJ2
1Power TerminalTerminalBlock_Phoenix:TerminalBlock_Phoenix_MKDS-1,5-2-5.08_1x02_P5.08mm_HorizontalJ1
1Pumps TerminalTerminalBlock_Phoenix:TerminalBlock_Phoenix_MKDS-1,5-8-5.08_1x08_P5.08mm_HorizontalJ3
1Qg1TestPoint:TestPoint_Pad_1.5x1.5mmTP3
1Qg2TestPoint:TestPoint_Pad_1.5x1.5mmTP10
1Qg3TestPoint:TestPoint_Pad_1.5x1.5mmTP11
1Qg4TestPoint:TestPoint_Pad_1.5x1.5mmTP12
1VinTestPoint:TestPoint_Pad_1.5x1.5mmTP1

Questions

How big is the Pump Interface PCB?

It measures 157.5 × 111.8 mm and has 4 copper layers, 1.57 mm thick.

What parts does the Pump Interface use?

87 parts, built around the 74AHCT125D, 15SQ100, IRLZ44N and 1.5KE43A. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.

Where can I download the Pump Interface KiCad files?

From the Mighty-Tronics/MightyDrive repository on GitHub, at the commit this page was made from: the board is Kicad_Files/Pump Interface.kicad_pcb and its schematic Kicad_Files/Pump Interface.kicad_sch. PCBKit opens the board in the browser, with nothing to install.

Can I use the Pump Interface design in my own project?

Its repository publishes it under the CERN-OHL-S-2.0 licence: you may reuse it on that licence's terms (keep the author's notice, and for a copyleft licence share your changes alike).

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