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4 layers160 × 210 mmCarrier, the printed circuit board in 3D

Pico-based SD, RAM and controller replacement for Robotron PC 1715

Size
160 × 210 mm
Copper layers
4
Thickness
1.6 mm
Parts
80
Nets
165
Pads
622
Tracks, vias
3,630, 722
Pours
5
Routed
Yes
KiCad
KiCad 10.0 (file 20260206)
Created
25 Oct 2026
Updated
28 Oct 2026

Overview

Carrier is an open-source printed circuit board by ddanila, from the ddanila/Pico1715 repository on GitHub, published under the MIT licence. It is a 4-layer board of 160 × 210 mm with 80 parts on 165 nets, routed with 3,630 tracks and 722 vias.

It is built around the SN74AHCT541DWRE4, SN74LVC07ADRG3 and SN74LVC541ADWRE4, with the SN74LVC08ADRG3, SN74AHCT1G125DBVR(UMW) and 10UF 10V among its other parts. Its parts include 24 resistors, 22 capacitors, 10 ICs, 7 connectors and 1 diode.

Main components

9

README

hardware/x2-adapter/README.md

Provisional X2 passive breakout

This separate 100 × 33 mm PCB routes all 58 EFS58 contacts to a 2×30, 2.54 mm header. It provides an inspectable adapter and continuity fixture. It is not released for fabrication or host insertion, and does not place X2 on the carrier.

The schematic, PCB, contact map and 1:1 drilling template use the audited 202-58 Form 7 reference. A contacts go to odd header pins; B contacts go to even pins; 59/60 are NC. All traces are separate, including host ground contacts. No active electronics, power source, pull-ups or bus termination are fitted.

The connector PCB tails have 2.5 mm contact pitch and 5 mm row spacing; the mating rows are 2.5 mm apart. Mounting holes are 85 mm apart, diameter 2.7 mm. The board edge is 6.5 mm toward the connector from row A. Finished contact holes of 1.0 mm and pads of 1.8 mm are design choices, not certified contact-fit limits. The original edge datum puts mounting-hole centres only 1.5 mm inside the edge; verify the actual connector mounting hardware before approving this outline.

A/B numbering is derived from the termination drawing. A real sample must confirm orientation, contact fit, body envelope, mounting and motherboard clearance. The template does not model the connector body or a proven printable housing. Print at 100% and check its 10 mm scale bar. The 2×30 header is a provisional probing/harness interface; cable length and signal integrity remain unqualified. Power pins must not be wired from this map without verifying both ends against the host and carrier schematics.

Regenerate with /usr/bin/python3 tools/generate_x2_adapter.py; verify with make test-x2-adapter-cad. The copied KiCad header footprint retains its upstream library provenance; the project's MIT license does not relicense third-party library assets. The EFS reference footprint and generator are original work.

Parts

80
QtyValueFootprintReferences
19100nFCapacitor_SMD:C_0805_2012MetricC1, C2, C3, C4, C5, C6, C10, C11, C12, C13, C14, C15, C16, C17, C18, C19 +3
114k7Resistor_SMD:R_0805_2012MetricR7, R8, R9, R10, R11, R12, R13, R17, R19, R20, R21
5SN74LVC541ADWRPackage_SO:SOIC-20W_7.5x12.8mm_P1.27mmRX1, RX2, RX3, RX4, RX5
4MountingHole_3.2mm_M3MountingHole_3.2mm_M3H1, H2, H3, H4
310uF_10VCapacitor_SMD:C_0805_2012MetricC20, C21, C22
322kResistor_SMD:R_0805_2012MetricR2, R4, R6
32k2Resistor_SMD:R_0805_2012MetricR1, R3, R5
347kResistor_SMD:R_0805_2012MetricR22, R23, R24
3SN74CB3Q3245PWRPackage_SO:TSSOP-20_4.4x6.5mm_P0.65mmISO1, ISO2, ISO3
21kResistor_SMD:R_0805_2012MetricR14, R15
2SN74LVC00ADRPackage_SO:SOIC-14_3.9x8.7mm_P1.27mmU8, U13
2SN74LVC08ADRPackage_SO:SOIC-14_3.9x8.7mm_P1.27mmU6, U7
2TLV803EA30DBZRPackage_TO_SOT_SMD:SOT-23U10, U12
1100kResistor_SMD:R_0805_2012MetricR16
110kResistor_SMD:R_0805_2012MetricR18
161206021621_HOST_HARNESSPico1715_RevA:IDC_Wuerth_61206021621J6
1693071010811Pico1715_RevA:microSD_Wuerth_693071010811J3
1B3B-XH-A_RESERVE_POWERConnector_JST:JST_XH_B3B-XH-A_1x03_P2.50mm_VerticalJ7
1BRINGUP_PROBESConnector_PinHeader_2.54mm:PinHeader_1x15_P2.54mm_VerticalJ5
1JS202011JCQNPico1715_Carrier:JS202011JCQN_VendorPinsSW1
1OLIMEX_EXT1Connector_PinHeader_1.27mm:PinHeader_2x20_P1.27mm_VerticalEXT1
1OLIMEX_EXT2Connector_PinHeader_1.27mm:PinHeader_2x20_P1.27mm_VerticalEXT2
1OLIMEX_EXT3Connector_PinHeader_1.27mm:PinHeader_2x20_P1.27mm_VerticalEXT3
1PGM1_PIN5_CDONE_TAPConnector_PinHeader_2.54mm:PinHeader_1x02_P2.54mm_VerticalJ1
1PIM724_PICO_PLUS2Pico1715_Carrier:PIM724_SocketPairJ2
1REGULATED_5V_INPUTConnector_JST:JST_XH_B2B-XH-A_1x02_P2.50mm_VerticalJ4
1SN74AHCT1G125DBVRPackage_TO_SOT_SMD:SOT-23-5U5
1SN74AHCT541DWRPackage_SO:SOIC-20W_7.5x12.8mm_P1.27mmU4
1SN74LVC07ADRPackage_SO:SOIC-14_3.9x8.7mm_P1.27mmU9
1SS14Diode_SMD:D_SMAD1
1TLV803EA46DBZRPackage_TO_SOT_SMD:SOT-23U11

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Questions

How big is the Carrier PCB?

It measures 160 × 210 mm and has 4 copper layers, 1.6 mm thick.

What parts does the Carrier use?

80 parts, built around the SN74AHCT541DWRE4, SN74LVC07ADRG3, SN74LVC541ADWRE4 and SN74LVC08ADRG3. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.

Where can I download the Carrier KiCad files?

From the ddanila/Pico1715 repository on GitHub, at the commit this page was made from: the board is hardware/carrier-reva/carrier.kicad_pcb and its schematic hardware/analyzer-interface/analyzer-interface.kicad_sch. PCBKit opens the board in the browser, with nothing to install.

Can I use the Carrier design in my own project?

Its repository publishes it under the MIT licence: you may reuse it on that licence's terms (keep the author's notice, and for a copyleft licence share your changes alike).