BQ2

Overview

This project is a small solar-harvesting power supply based on the Texas Instruments BQ25570. The board provides a regulated output with a nominal maximum of 3.2 V.

Design intent:

• Minimize PCB area
• Minimize part count
• Use only a subset of BQ25570 features

Primary objectives:

• Charge large output-side storage capacitors efficiently
• Limit the regulated output to 3.2 V

The internal energy store is connected at BQ25570 VOUT (regulated output), following the supercapacitor-charging example in the BQ25570 Evaluation Module User's Guide.

Status

I tested the first revision using a PCB from OshPark, placed and reflowed myself (that is just barely possible for hobbyists.) It did not work. VSTOR did not reach 4.8V (programmed OV overvoltage) and VOUT did not reach 3.2 (programmed VOUT voltage.)

I cut the traces to VBAT_OK and VBAT_OK_HYST (let them float.) That seemed to fix it (either that, or miscellaneous solder touch up.) The next revision will tie those pins to ground, per advice from TI Forum.

See below for more discussion.

Intended use

The design is suitable for light or intermittent loads, not for continuous, tightly regulated power delivery.

Operational limitations:

• No output in dark or very low-light conditions
• Limited stored energy
• Slow voltage ramp up
• No dedicated status signal

Tested application: MSP430FR2311 MCU driving a small intermittent load.

Unused BQ25570 features

• Battery not used (VBAT tied to VSTOR)
• VBAT_OK signal not used
• Custom MPPT set point not used (VOC_SAMP tied to VSTOR, MPPT fixed at 80% of Voc)
• Output-disable control not used (VOUT_EN tied to VSTOR, output always enabled)

Input requirements

Typical source: small solar cell/panel (order of tens of square centimeters).

Input voltage constraints:

• Absolute design limit for the source under all light conditions: 5.5 V
• BQ25570 datasheet recommendation: <= 5.1 V

Startup requirement:

• The source must provide at least 0.7 V operating voltage (Vop) at some illumination level.
• A single photovoltaic junction near 0.6 V is generally insufficient for reliable startup.

Test source: PowerFilm LL200-2.4-75.

Output characteristics

• Output range: 0 V to 3.2 V
• Maximum output current: 110 mA (datasheet value)

Do not connect a battery to the output of this design. You can connect tantalum capacitors or supercapacitors for additional storage.

Startup ramp behavior

Output ramp time from 0 V depends on:

• Illumination
• Solar-cell active area
• Output-side storage capacitance
• Leakage of the storage and load

The BQ25570 remains in cold start until VOUT reaches 1.8 V. During cold start, the internal conversion path is less efficient, so the output ramp is shallow. Above 1.8 V, the normal boost path is engaged and the ramp slope increases.

Example: low-light ramp profile

The following measurement represents near worst-case operation:

• Input source: PowerFilm LL200-2.4-75
• Illumination: 200 lux (typical indoor lighting)
• Output storage: 4.4 mF tantalum capacitor
• Additional load: MCU plus quiescent IC load

Observed behavior:

• 0 V to 1.8 V: approximately 2 hours (cold start phase)
• 1.8 V to 3.2 V: a few minutes

At 200 lux, LL200-2.4-75 can supply about 0.3 mW at MPPT (about 200 uA at 1.6 V). In cold start, the harvester holds the source near 0.3 V and conversion efficiency can be low (order of 10%), so available output current can drop to about 20 uA.

During cold start, output load is often dominated by capacitor leakage. A common tantalum leakage estimate is:

I = 0.01 * C * V

For the 4.4 mF example, leakage current is on the order of 10 uA, which explains the long startup time at low light.

Internal switching pulses

The IC switches charge between CStor and COut internally. Pulses are observable at the VSTOR test point with an oscilloscope. With appropriate local capacitance, these pulses should not be significant at the regulated output node.

MCU compatibility considerations

This power supply may not be adequate for MCU loads.

Slow supply ramps can cause some MCUs to enter undefined states before brownout/reset logic is fully effective. If this occurs, recovery may require a prolonged dark period so the power rail discharges close to 0 V before a clean restart.

Example MCU load

In testing, an MSP430FR2311 booted properly from this power supply under the following conditions:

• from dark turning on a 200 lux light
• 4.4 mF of additional storage on the output pin
• An LL200-2.4-75 solar cell providing 3 mW at MPPT

Refer to "Example ramp time."

This power supply board is surreptitiously suited to the MSP430 series of MCU. An MSP430 series MCU boots at 1.9V. At lower voltage, the MCU draws practically no current. This board leaves cold start at 1.8V. After that, the output voltage ramps up quickly enough to cleanly boot the MCU.

An MSP430 MCU can monitor its power supply voltage (Vcc).
It does not necessarily need the VBAT_OK signal from the BQ to power up cleanly. The program of the MCU can monitor its supply voltage and avoid driving loads when power reserves are inadequate.

Notes on resistor-net programming

This design uses only two resistors instead of seven. Their values are chosen primarily to set the maximum output voltage to 3.2 V. The over-voltage programming signal piggybacks on the That makes the over-voltage secondary in this design, but it yields a set point of 4.8V. VOUT_SET and VBAT_OV programming pins are tied to the same point: the midpoint of the two-resistor network.

In most designs, there is a resistor network with three legs. Each leg is 13 MOhm, and the VRDIV pin sees a total resistance of about 4 MOhm. These high resistances minimize quiescent current, but they are more sensitive to stray leakage on contaminated boards. Here the two resistors also sum to about 4 MOhm.

Battery OK signal

Here I chose not to use the signal. There is no battery. There is no large storage capacitor on VSTOR to monitor the voltage of. If you want to know the voltage on VOUT, use the MCU's ADC to measure it.

An initial design tried to at least program the signal, by routing VBAT_OK and VBAT_OK_HYST to the same resistor net. That would give a reasonable range, and you could still use the signal out. That did not work, for unknown reasons.

The next revision routes those pins to ground. Per common recommendations on the TI forum. The datasheet also says "If not used, connect this pin to GND."

More about the programming resistor net

There is a diagram of the internal architecture on an old slide page 41 of "Powering the Internet of Things" by Yogesh Ramadass. This is my interpretation, I could be wrong.

The net has three legs (OV, OK, and OUT_SET) external, and probably a UV leg internal. The top of all legs is powered by the VRDIV pin. The net power is duty-cycled, and the nets sampled, every 64 msec. This saves power.

Each external legs midpoint (and one other point) is fed back into the BQ (VBAT_OK, VBAT_OK_HYST, V_OUT_SET, and VBAT_OV.) Each is fed back to a comparator in the BQ. The input to a comparator is high impedance, but the current is probably nanoamps. The current through each leg from VRDIV is about 100 nA. So the current to each comparator does not affect the sampling.

When you use one external net for all three sampling points, you end up with three comparators on the same net. If the comparators are all enabled at the same time, and the total current to the comparators is not negligible, it affects the sampled value, since the current is parallel to the lower of the resistors.

There are other switches involved (for example "KZ") which are not explained. I don't understand why you can't use a shared network for VBAT_OK and VBAT_OK_HYST programming, but tests show it doesn't work.

You can't route VBAT_OV to ground

Suppose you are not using a battery, and instead are using a capacitor with a high max voltage rating.

If you route VBAT_OV to ground, the BQ does not limit the charging to VSTOR/VBAT. The boost converter multiplies the voltage of VIN, without restraint. My testing showed VSTOR reaches for example 8V. But the datasheet specifies a max voltage limit on VSTOR of 5.5V. IOW you must program VBAT_OV to some value below 5.5V. The BQ chip does not limit the output of the boost converter except by that programming.

Contents of the repo

The repository contains the KiCad design files for the PCB, plus:

• BOM.csv: Exported bill of materials.
• gtkprintP21GS3: Exported PDF of the schematic.