Demo board

kicad-splitplane

Split a KiCad power layer into exactly one continuous copper zone per voltage, computed from where your vias are.

Documentation →

Available in KiCad's official Plugin and Content Manager: search for kicad-splitplane and press Install (listing).

On a 4-layer board the inner power layer is often shared by several supplies (5V, 3.3V, 1.8V…). Each supply needs its own zone, and each zone has to

• contain every via and through-hole pad of its net,
• contain nothing of the other nets,
• be one continuous surface.

Drawing those outlines by hand is trial and error. kicad-splitplane does it for you and writes the zones straight into a copy of your .kicad_pcb.

Quick start

git clone https://github.com/atuzlak/kicad-splitplane
cd kicad-splitplane
pip install -r requirements.txt        # shapely>=2.0, numpy, scipy, matplotlib

python kicad_splitplane.py examples/demo_board.kicad_pcb --nets +5V +3V3 +1V8

On your own board:

python kicad_splitplane.py board.kicad_pcb --list-nets                      # find the supply nets
python kicad_splitplane.py board.kicad_pcb --layer In2.Cu --nets 5V 3.3V VBUS

This writes board_splitplane.kicad_pcb (your board plus the zones; the original is untouched), board_splitplane.png (preview) and a copy of the project files (board_splitplane.kicad_pro/.kicad_prl) that keeps your design rules and shows every zone in its preview colour. Open the new board in KiCad, press B to fill the zones and run DRC.

Or install it as a command:

pip install git+https://github.com/atuzlak/kicad-splitplane
kicad-splitplane board.kicad_pcb --nets 5V 3.3V VBUS

KiCad plugin

The same tool also runs inside the PCB editor (KiCad 9 or newer). It works on the open board, shows a preview and writes the zones directly into the board as one undo step, so Ctrl+Z removes them again.

1. In KiCad: Preferences → Plugins → Enable KiCad API.
2. Open the Plugin and Content Manager, search for kicad-splitplane under Plugins and press Install, then Apply Pending Changes. It is listed in KiCad's official plugin repository, so KiCad offers new versions as updates there. Offline, or to try a version before it is listed: download kicad-splitplane-<version>-pcm.zip from the releases and use Install from File… (uninstall a zip-installed copy before installing from the list, so updates work). KiCad installs the Python dependencies on first use, which takes a minute.
3. In the PCB editor, click the Split power plane toolbar button, pick the layer and nets, press Preview, then Apply.

The dialog has the same options as the command line. It uses the wxPython that ships with KiCad, so nothing else needs to be installed.

For development, link the folder into KiCad's plugin directory instead of installing the zip (e.g. ~/.local/share/kicad/10.0/plugins/, or ~/.var/app/org.kicad.KiCad/data/kicad/10.0/plugins/ for the Flatpak; a Flatpak cannot follow a symlink, so copy the folder together with kicad_splitplane.py there), or run python plugin/splitplane_action.py while KiCad has a board open.

Options

Exit code is 0 when every net got one clean zone, 1 when there are warnings.

How it works

1. Seeds. Read the board (a small S-expression parser, no KiCad needed) and collect every via and through-hole pad of the chosen nets that reaches the layer, plus the outline from Edge.Cuts. All other vias, pads and holes on the layer (signals, GND, mounting holes) are read with their real size as obstacles.
2. Spines. For each net, join all its vias with a tree of 45° paths on a grid (Prim's algorithm with Dijkstra). Paths keep clear of other nets' vias and pads and of spines routed before, never squeeze through gaps too narrow for copper (e.g. between header pins), avoid passages narrower than --min-neck and prefer the middle of free space. All routing orders of the nets are tried; the one with the fewest trapped vias and the shortest spines wins.
3. Split. Every pad and via keeps a ring of its own net around it. Every other grid cell goes to the nearest spine, measured around obstacles rather than through them, i.e. a Voronoi diagram of the spines instead of the vias. A region grown from one connected spine is connected. The borders are then simplified together (so neighbours keep a shared border) and bent into 0°/45°/90° segments, keeping the exact grid border only around pads where the smooth one would cut a pad ring. The regions are clipped to the outline, shrunk by half the gap and written as KiCad zones.
4. Check. The tool estimates what KiCad will actually fill (zone minus clearance around other nets' copper) and warns about zones running over another supply's pad, pads/vias cut off from their zone, copper split by rows of pads, and necks narrower than --min-neck.

If a via is completely enclosed by other nets, no continuous split exists. The tool reports it and suggests where to move it:

! 5V: via at (87.59, 56.06) is trapped by other nets -> move it to ~(92.60, 65.46) (10.6 mm fanout)

Library use

import kicad_splitplane as sp

text = open("board.kicad_pcb", encoding="utf-8").read()
r = sp.process(text, "In2.Cu", ["5V", "3.3V", "VBUS"], gap=0.5)

print("\n".join(r.log))
open("board_split.kicad_pcb", "w").write(r.board_text)
sp.render_png(r, "preview.png")

Website

web/ contains the documentation page; python web/make_figures.py renders its figures. ./deploy.sh builds it as one self-contained file (dist/kicad-splitplane.html), ./deploy.sh --serve previews it locally, ./deploy.sh user@host:public_html uploads it.

Tips and limitations

• Awkward zones usually mean awkward via placement. Keep each net's vias grouped and use short fanout tracks.
• Signals on the neighbouring layer use the split plane as return path; avoid routing them across the gaps.
• Zones are written as outlines without holes. Smaller zones get a higher priority so an enclosed island still fills; check the order in KiCad's Zone Manager.
• The command line tool is tested with KiCad 10 files; KiCad 7–9 net syntax is supported too. The plugin needs KiCad 9 or newer. Arcs in the outline are approximated, blind/buried vias are handled roughly.

Tests

python -m pytest tests/        # plugin tests run when kicad-python is installed

Feedback and contact

Found a bug, have an idea for an improvement, or interested in collaborating? Write me an email at atuzlak@ethz.ch. Issues and pull requests are welcome too.

License

MIT, © 2026 Aleksandar Tuzlak