2 layers101.6 × 76.2 mm
Cascadable Full Adder
Daedalus-op/PCB-Designs
A repo documenting the creation of a PISO register in Kicad 8.0
12 parts
2 layers101 × 76 mm
A repo documenting the creation of a PISO register in Kicad 8.0
- Size
- 101 × 76 mm
- Copper layers
- 2
- Thickness
- 1.6 mm
- Parts
- 17
- Nets
- 28
- Pads
- 84
- Tracks, vias
- 230, 28
- Routed
- Yes
- KiCad
- KiCad 8.0 (file 20240108)
- Created
- 13 Apr 2024
- Updated
- 28 Jan 2025
Overview
Piso is an open-source printed circuit board by Daedalus-op, from the Daedalus-op/PCB-Designs repository on GitHub. It is a 2-layer board of 101 × 76 mm with 17 parts on 28 nets, routed with 230 tracks and 28 vias.
It is built around the CD4013BMT, ADG794BRQZ and DS04-254-2-03BK-SMT, with the PPTC041LFBN-RC among its other parts. Its parts include 5 resistors, 5 diodes, 3 ICs, 3 switches and 1 connector.
Main components
4
CD4013BMT
SOIC-14-55℃~+125℃ 1 10ns 2 24MHz 3V~18V 4000B Series 4uA 5ns 5pF 6.8mA 6.8mA 90ns@15V,50pF Asynchronous Complementary type D-Type Rising Edge Set and Reset SOIC-14 Flip Flops ROHSTexas InstrumentsFlip Flops
ADG794BRQZ
QSOP-16-150mil-40℃~+85℃ 23pF 2:1 3.3V、5V 300MHz 4 5ns 5Ω 7ns QSOP-16-150mil Analog Switches, Multiplexers ROHSAnalog DevicesAnalog Switches / MultiplexersDS04-254-2-03BK-SMT
--40℃~+85℃ 2.54mm 24V 25mA 3 SPST - DIP Switches ROHSCUIDIP Switches
PPTC041LFBN-RC
插件,P=2.54mm-40℃~+105℃ 1 1x4P 2.54mm 250V 3A 4P 8.51mm Phosphor bronze Square Hole Through Hole Tin Top Plugin,P=2.54mm Female Headers ROHSSullins Connector SolutionsFemale Headers
README
Cascadable_Full_Adder/README.mdCascadable Full Adder
Parts
17| Qty | Value | Footprint | References |
|---|---|---|---|
| 5 | LED | LED_THT:LED_D5.0mm | D0, D1, D2, D3, Dout1 |
| 5 | RP73D1J13RBTDG | RP73D1J13RBTDG:RESC1608X50N | R1, R2, R3, R4, R5 |
| 2 | CD4013BMT | CD4013BMT:SOIC127P600X175-14N | U3, U4 |
| 2 | DS04-254-2-03BK-SMT | DS04-254-2-03BK-SMT:SW_DS04-254-2-03BK-SMT | S1, S2 |
| 1 | 1825910-6 | 1825910-6:SW_1825910-6-4 | SW1 |
| 1 | ADG794BRQZ | ADG794BRQZ:SOP64P600X175-16N | U2 |
| 1 | PPTC041LFBN-RC | PPTC041LFBN-RC:SULLINS_PPTC041LFBN-RC | J1 |
More from Daedalus-op/PCB-Designs
1Similar boards
- 8 layers45 × 70 mm
- 4 layers92.7 × 76.2 mm
Dut artix7-a12t
GMUCERG/fobos
Flexible Open-source workBench fOr Side-channel analysis (FOBOS)
199 parts18Apache-2.0 - 4 layers124 × 23 mm
Octobot controller
Deivid-Negoita/octobot
An eight-legged walking robot I built end to end: chassis CAD, a 24-servo ATmega32U4 controller board, the firmware, and a browser IK workbench you can drive it from.
120 parts1MIT - 4 layers70 × 70 mm
- 4 layers160 × 80 mm
- 2 layers100 × 100 mm
- 2 layers142.1 × 106 mm
- 2 layers142.1 × 90.8 mm
Questions
How big is the Piso PCB?
It measures 101 × 76 mm and has 2 copper layers, 1.6 mm thick.
What parts does the Piso use?
17 parts, built around the CD4013BMT, ADG794BRQZ, DS04-254-2-03BK-SMT and PPTC041LFBN-RC. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.
Where can I download the Piso KiCad files?
From the Daedalus-op/PCB-Designs repository on GitHub, at the commit this page was made from: the board is PISO_Shift_Registor/piso.kicad_pcb and its schematic Cascadable_Full_Adder/FA.kicad_sch. PCBKit opens the board in the browser, with nothing to install.
Can I use the Piso design in my own project?
Its repository states no licence, so its author keeps all rights: ask Daedalus-op before reusing the design.