LLC DCDC V5

1200 W · 400 V → 48 V · LLC Resonant DC-DC Converter

Open-Source Hardware Design for Electric-Vehicle Auxiliary Power

A complete, open-source hardware project — from analytical tank design through PCB fabrication, embedded control firmware, EMC testing, and efficiency characterization — targeting the 400 V traction bus to 48 V auxiliary rail conversion found in modern electric vehicles.

Interactive Project Page & Gallery

Table of Contents

• Context & Motivation
• Key Specifications
• Repository Map
• Hardware Design
  • LLC Resonant Tank
  • Planar Magnetics
  • Power MOSFETs
  • Capacitor Bank
  • EMI Filter (CISPR 25)
  • Gate Driver & HW Protection
  • Thermal Management
  • Schematic, PCB & BOM
• Embedded Firmware
• Validation & Testing
• Tools & Technologies
• Getting Started
• Project Page
• License

Context & Motivation

In battery electric vehicles (BEVs) and 48 V mild-hybrid architectures, a high-voltage DC-DC converter steps the 300–400 V traction battery bus down to the 48 V auxiliary rail that powers lighting, HVAC blowers, infotainment, ADAS sensors, and body-control electronics. The LLC resonant topology is the industry-preferred choice for this role because it naturally achieves zero-voltage switching (ZVS) across the load range, yielding high efficiency, low EMI, and compact magnetics.

This project documents the complete physical design of such a converter:

1. Analytical Design — Resonant tank optimisation, magnetic core selection, MOSFET thermal analysis, EMI filter sizing, and PCB trace calculations — all in reproducible Jupyter notebooks.
2. Hardware Build — KiCad schematic (V5), BOM, Gerber files, and a custom PCB with planar magnetics.
3. Embedded Control — 23 iterative firmware versions on an STM32F103C8T6, culminating in an adaptive PI controller with thermal derating (bare-metal C/C++, register-level).
4. Test & Characterisation — EMC conducted-emissions testing (CISPR 25 setup), safety tests, LLC gain & tank characterisation, and full-load efficiency measurements.

Note: This is primarily a hardware/power-electronics project. The firmware is a supporting element written in embedded C++ on an STM32 to close the voltage-regulation loop — it is not a software product.

Key Specifications

Repository Map

Design_of_1200W_LLC_DCDC/
│
├── 01_specifications/              ← System-level specification (see companion spec document)
├── 02_architecture/                ← High-level converter architecture & block diagrams
│
├── 03_hw_design/                   ── HARDWARE ──────────────────────────────────
│   ├── 01_design_justification/    ← Parametric calculations & Jupyter notebooks
│   │   ├── 01_llc_tank/                  Resonant tank (Lr, Cr, Lm, Q, fn curves)
│   │   ├── 01_transformer_and_Lr_cores/  Core selection (TDK N97 planar ferrite)
│   │   ├── 02_mosfets/                   MOSFET thermal & switching-loss analysis
│   │   ├── 03_resonant_and_output_capacitor/  Ripple, ESR, RMS current stress
│   │   ├── 04_measurements/              Sensor calibration (ADC ↔ voltage)
│   │   ├── 05_gate_driver/               Bootstrap & level-shift design
│   │   ├── 06_emi_filters/               CM choke, X/Y caps, damper network
│   │   ├── 07_power_supp/                Auxiliary flyback & LM2575 supplies
│   │   ├── 08_HeatSink/                  Heat-sink thermal-resistance sizing
│   │   ├── 09_Hw_protection/             OVP / OCP via 74HC74 flip-flop logic
│   │   └── 10_cb_calculations/           Trace width, via current, creepage
│   ├── 02_schematic_and_bom/       ← KiCad schematics, Gerbers, BOM
│   └── 03_components/              ← Datasheet library (129 parts)
│
├── 04_sw_design/                   ── EMBEDDED FIRMWARE ─────────────────────────
│   ├── 01_investigations/              STM32 & ESP32 bring-up tests
│   ├── 04_PWM_Freq_Change/             Switching-frequency modulation trials

Hardware Design

Every design choice is justified with reproducible calculations in Jupyter notebooks, supported by LTspice simulations and component datasheets.

LLC Resonant Tank

The resonant-tank parameters — resonant frequency $f_0$, inductance ratio $L_n = L_m / L_r$, quality factor $Q$ — were optimised to deliver the required voltage gain $M_g$ across the full 360–400 V input range while maintaining ZVS down to light load.

$$M_g = \left| \frac{L_n \cdot f_n^2}{\left[(L_n + 1) f_n^2 - 1\right] + j\left[(f_n^2 - 1) f_n Q_e L_n\right]} \right|$$

Notebook: 03_hw_design/01_design_justification/01_llc_tank/

PDF report: LLC Tank Design Note

Planar Magnetics

Both the main transformer ($L_m ≈ 65 \text{ µH}$) and the resonant inductor ($L_r$) use TDK N97 planar ferrite cores, chosen for low core-loss density at 100 kHz and excellent thermal conductivity. Transformer turns ratio is $n = V_{in,nom}/(2 \times V_{o,nom}) = 380/96 ≈ 4$.

Notebook: 03_hw_design/01_design_justification/01_transformer_and_Lr_cores/

PDF report: Magnetic Cores Design

Power MOSFETs

ZVS dead-time requirement: $t_{dead} \geq 16 \cdot C_{eq} \cdot f_{sw} \cdot L_m$ — set to ≈ 100 ns with margin.

Notebook: 03_hw_design/01_design_justification/02_mosfets/

Capacitor Bank

Six B40910A8127M000 (120 µF, 150 °C rated aluminium electrolytic) capacitors in parallel:

• Total capacitance: ≥ 576 µF (with 20 % worst-case derating)
• Equivalent ESR @ 100 kHz: 17 mΩ / 6 ≈ 2.8 mΩ (< 3.18 mΩ target)
• Output ripple budget: < 250 mV pp (50 % capacitive + 50 % resistive split)

Notebook: 03_hw_design/01_design_justification/03_resonant_and_output_capacitor/

PDF report: Output Capacitor Design

EMI Filter (CISPR 25)

Two-stage common-mode / differential-mode filter designed for automotive conducted-emissions compliance:

• CM resonant frequency: ≈ 170 kHz
• DM LC cut-off: ≈ 425 kHz
• Leakage inductance (DM): 1.4 µH

Design report: 03_hw_design/01_design_justification/06_emi_filters/justification.md

Gate Driver & HW Protection

• Gate driver IC: UCC21520Q with bootstrap supply for high-side drive.
• Fast hardware protection: 74HC74 D flip-flop latches OVP/OCP faults and disables PWM within nanoseconds — independent of firmware response time.
• Voltage/current sensing: Resistive dividers and ACS70331 current sensor, calibrated against 12-bit ADC ($V_{out} = 0.03081 \times ADC - 0.0976$).

Design files: 05_gate_driver/ · 09_Hw_protection/

Thermal Management

Heat-sink thermal resistance sized for worst-case junction temperature of primary TO-247 MOSFETs at full 1 200 W load, with forced-air fan controlled via TIM2 PWM on the STM32.

Notebook: 03_hw_design/01_design_justification/08_HeatSink/

Schematic, PCB & BOM

Designed in KiCad. Trace widths and via counts calculated for 25 A output current with 0.5 oz – 2 oz copper options evaluated.

Source files: 03_hw_design/02_schematic_and_bom/

Embedded Firmware

The firmware is a supporting element of the hardware design — embedded C++ on an STM32, bare-metal (no HAL, no RTOS), for deterministic real-time PWM and ADC control.

STM32F103C8T6 @ 72 MHz
├── TIM1_CH2  (PA9)  → High-side gate drive
├── TIM1_CH2N (PB14) → Low-side gate drive   (dead-time DTG ≈ 100 ns)
├── ADC1 (PA0–PA7)   ← Vin, Vout, Isense, Temp
├── GPIO (PB10/12)   → 74HC74 flip-flop enable / reset
├── TIM2 (PA10)      → Fan PWM
└── UART (CH340)     → Serial telemetry @ 115 200 baud

Control evolution (23 versions):

The latest firmware (PI_V23_adaptive_step_delay_derating) implements proportional-integral voltage regulation, adaptive step-delay for transient optimisation, thermal derating at elevated temperatures, and a controlled soft-start frequency ramp.

Latest firmware: 04_sw_design/new_control/PI_V23_adaptive_step_delay_derating/

Full archive (V1 – V21): 04_sw_design/CONTROL/

Validation & Testing

A 12-category validation campaign was carried out on the physical converter:

System-Level Tests

Subsystem-Level Tests

All test data: 05_validations/

Tools & Technologies

Getting Started

Browsing the Design

1. Read the Specification to understand the top-level requirements.
2. Open the LLC Tank Design Notebook for resonant-converter theory and parameter selection.
3. Review the Schematic (PDF) for the complete circuit.
4. Check the BOM for component sourcing.

Building the Firmware

1. Install Arduino IDE with the STM32duino board package.
2. Select board: Generic STM32F1 series → STM32F103C8.
3. Open 04_sw_design/new_control/PI_V23_adaptive_step_delay_derating/PI_V23_adaptive_step_delay_derating.ino.
4. Connect the STM32 Blue Pill via ST-Link or USB-to-Serial (CH340).
5. Compile and upload.

Reproducing the Notebooks

pip install jupyter numpy scipy matplotlib handcalcs
jupyter notebook

Open any .ipynb file in 03_hw_design/01_design_justification/.

Project Page

An interactive project page with documentation, downloadable PDFs, and a photo gallery:

https://boab235.github.io/pages/llc/llc.html

License

This project is open-source under the MIT License. See the repository for details.